Abstract: There is provided a semiconductor device including an oscillation circuit that includes a plurality of capacitors provided on a semiconductor substrate, a conversion circuit that converts an analog signal into a digital signal, and a switch circuit that switches the capacitors on the basis of the digital signal. Further, an oscillation frequency linearly varies with respect to a variation in the analog signal.

Abstract: [Overview] [Problem to be Solved] To provide a semiconductor device and a wireless communication apparatus each of which makes it possible to suppress the manufacturing cost and the power consumption while maintaining the manual operability. [Solution] There is provided a semiconductor device including: an oscillation circuit including a plurality of capacitors provided on a semiconductor substrate; a conversion circuit that converts an analog signal into a digital signal; and a switch circuit that switches the capacitors on the basis of the digital signal. An oscillation frequency linearly varies with respect to a variation in the analog signal.

Abstract: An electronic apparatus includes: a first integrated circuit including an internal component section capable of being adjusted with adjustment data, a nonvolatile memory in which beforehand acquired adjustment data of a result of adjustment carried out in advance for the internal component section are stored, and an interface section having a data transfer function of transferring the beforehand acquired adjustment data read out from the nonvolatile memory to the outside and a data storage function of storing actual use adjustment data sent thereto from the outside and supplying the stored actual use adjustment data to the internal component section; and a second integrated circuit including a signal processor, to which the interface section of the first integrated circuit is connected.

Abstract: A high-frequency amplifier includes: an amplification section having a function to convert an input signal from a voltage signal into a current signal and output the current signal; output terminals; and a load circuit which is connected to the output node of the amplification section and outputs the current signal output by the amplification section to the output terminals as a voltage signal.

Abstract: A switch circuit which can operate with a single low voltage is provided. A plurality of (i=0 to n) series circuits of a capacitor (Ci) and a path of the drain-source of a MOS-FET (Qi) are connected in parallel to each other between a first terminal T1 and a second terminal T0. In each of the series circuits, a pull-up resistor Ri is connected between an output terminal of an inverter Ai and a junction between the capacitor Ci and the MOS-FET (Qi). Each bit bi of digital data for controlling the capacitance is supplied to the gate of the MOS-FET (Qi) and the inverter Ai in each of the series circuits. Capacitance which varies in response to the value of the digital data is obtained between the first terminal T1 and the second terminal T0.

Abstract: An IC of a front end circuit which can be ready for various television broadcasting systems is provided. The front end circuit includes tuning circuits 12A to 12C and 14A to 14C and high frequency amplifiers 13A to 13C individually corresponding to a plurality of reception bands of television broadcasts. The front end circuit further includes a switch circuit 11 for selectively supplying reception signals to the tuning circuits 12A to 12C, and a switch circuit 15 for selectively extracting outputs of the tuning circuits 14A to 14C. The front end circuit further includes mixer circuits 21I and 21Q to which an output of the switch circuit 15 is supplied, and a PLL 30 for supplying local oscillation signals SLOI and SLOQ having phases orthogonal to each other to the mixer circuits 21I and 21Q.

Abstract: Disclosed herein is a method for adjusting the tuning frequency of a tuning circuit, which is implemented as a parallel circuit of a coil and series circuits Ai each including a capacitor Ci and a switch device Qi (i=one to n, where n denotes an integer at least equal to two), by varying the tuning frequency through control to turn on and off the switch devices Qi in accordance with control data bi, the method for adjusting the tuning frequency of a tuning circuit including the steps of: finding control data bi for a desired tuning frequency from control data bi for a tuning frequency equal to a first frequency and control data bi for a tuning frequency equal to a second frequency; and applying the control data bi found for the desired tuning frequency to the switch devices Qi.

Abstract: A first terminal T1 is connected to the drain (or the source) of a MOS-FET (Q11), whose back gate is separated, through a capacitor C11. The MOS-FET (Q11) is connected at the source (or the drain) thereof to a second terminal T2. The back gate is connected to the source (or the drain). A control voltage VG is supplied to the gate of the MOS-FET (Q11), and a voltage having a polarity reversed from that of this control voltage VG is supplied to the drain through a resistance element R12.

Abstract: A high-frequency amplifier includes: an amplification section having a function to convert an input signal from a voltage signal into a current signal and output the current signal; output terminals; and a load circuit which is connected to the output node of the amplification section and outputs the current signal output by the amplification section to the output terminals as a voltage signal.

Abstract: Disclosed herein is a variable-gain amplification circuit, wherein the sources of first and second MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are tied to a common connection point connected to a current source. An input signal is supplied to the gates of the first and second MOSFETs. The drains of the first and second MOSFETs are connected to the sources of third and fourth MOSFETs respectively whereas the drains of the third and fourth MOSFETs are connected to two output terminals respectively, a gain control voltage is supplied to the gates of both the third and fourth MOSFETs. When control is executed in order to lower the gain control voltage supplied to the gates of both the third and fourth MOSFETs, other control is also executed in order to raise a bias voltage applied to the gates of both the first and second MOSFETs.

Abstract: A first terminal T1 is connected to the drain (or the source) of a MOS-FET (Q11), whose back gate is separated, through a capacitor C11. The MOS-FET (Q11) is connected at the source (or the drain) thereof to a second terminal T2. The back gate is connected to the source (or the drain). A control voltage VG is supplied to the gate of the MOS-FET (Q11), and a voltage having a polarity reversed from that of this control voltage VG is supplied to the drain through a resistance element R12.

Abstract: An IC of a front end circuit which can be ready for various television broadcasting systems is provided. The front end circuit includes tuning circuits 12A to 12C and 14A to 14C and high frequency amplifiers 13A to 13C individually corresponding to a plurality of reception bands of television broadcasts. The front end circuit further includes a switch circuit 11 for selectively supplying reception signals to the tuning circuits 12A to 12C, and a switch circuit 15 for selectively extracting outputs of the tuning circuits 14A to 14C. The front end circuit further includes mixer circuits 21I and 21Q to which an output of the switch circuit 15 is supplied, and a PLL 30 for supplying local oscillation signals SLOI and SLOQ having phases orthogonal to each other to the mixer circuits 21I and 21Q.

Abstract: A switch circuit which can operate with a single low voltage is provided. A plurality of (i=0 to n) series circuits of a capacitor (Ci) and a path of the drain-source of a MOS-FET (Qi) are connected in parallel to each other between a first terminal T1 and a second terminal T0. In each of the series circuits, a pull-up resistor Ri is connected between an output terminal of an inverter Ai and a junction between the capacitor Ci and the MOS-FET (Qi). Each bit bi of digital data for controlling the capacitance is supplied to the gate of the MOS-FET (Qi) and the inverter Ai in each of the series circuits. Capacitance which varies in response to the value of the digital data is obtained between the first terminal T1 and the second terminal T0.

Abstract: An electronic apparatus includes: a first integrated circuit including an internal component section capable of being adjusted with adjustment data, a nonvolatile memory in which beforehand acquired adjustment data of a result of adjustment carried out in advance for the internal component section are stored, and an interface section having a data transfer function of transferring the beforehand acquired adjustment data read out from the nonvolatile memory to the outside and a data storage function of storing actual use adjustment data sent thereto from the outside and supplying the stored actual use adjustment data to the internal component section; and a second integrated circuit including a signal processor, to which the interface section of the first integrated circuit is connected.

Abstract: A test signal generation circuit includes a tuning circuit, a local oscillation circuit for forming orthogonal local oscillation signals, first mixer circuits for frequency-converting the reception signal into IF signals by the local oscillation signals, IF-filters for extracting the IF signals from outputs of the first mixer circuits, phase shift circuits for shifting phases of the IF signals extracted by the IF-filters, a first calculation circuit for outputting an IF signal through addition/subtraction of outputs of the phase shift circuits, a forming circuit for forming orthogonal alternate current signals having a frequency equal to a frequency of the IF signals, second mixer circuits for receiving the orthogonal alternate current signals and the local oscillation signals, and a second calculation circuit for outputting a signal through addition/subtraction of outputs of the second mixer circuits, wherein an output of the second calculation circuit is supplied to the tuning circuit as a test signal.

Abstract: A multi-band receiver in which characteristics including a tracking error are improved is provided with a variable frequency oscillator circuit, a variable divider circuit (39) for dividing an oscillation signal (SVCO) of the variable frequency oscillator circuit, and mixer circuits (15I) and (15Q) for subjecting a received signal SRX to frequency conversion into an intermediate frequency signal (SIF) by a local oscillation signal (SLO). A divided output of the variable divider circuit (39) is supplied as the local oscillation signal (SLO) to each of the mixer circuits (15I) and (15Q). When a signal in a first frequency band is received, the division ratio n of the variable divider circuit (39) and the oscillation frequency of the variable frequency oscillator are changed to change the reception frequency in the first frequency band.

Abstract: In an automatic gain control unit, the gain of a voltage-controlled amplifier (VCA) (25) is regulated with a closed-loop control circuit. The time constant of the control circuit is varied dependent on the magnitude (31) of the VCA output signal. As long as the magnitude (31) of the VCA output signal is small, the gain is slowly adjusted. In case the magnitude (31) of the VCA becomes so large that saturation of the analog-digital converter (28) might occur, the time constant of the control circuit is decreased, in order to allow for a quick adjustment of the amplifier's gain.

Abstract: Disclosed herein is a variable-gain amplification circuit, wherein the sources of first and second MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are tied to a common connection point connected to a current source. An input signal is supplied to the gates of the first and second MOSFETs. The drains of the first and second MOSFETs are connected to the sources of third and fourth MOSFETs respectively whereas the drains of the third and fourth MOSFETs are connected to two output terminals respectively, a gain control voltage is supplied to the gates of both the third and fourth MOSFETs. When control is executed in order to lower the gain control voltage supplied to the gates of both the third and fourth MOSFETs, other control is also executed in order to raise a bias voltage applied to the gates of both the first and second MOSFETs.

Abstract: Disclosed herein is a method for adjusting the tuning frequency of a tuning circuit, which is implemented as a parallel circuit of a coil and series circuits Ai each including a capacitor Ci and a switch device Qi (i=one to n, where n denotes an integer at least equal to two), by varying the tuning frequency through control to turn on and off the switch devices Qi in accordance with control data bi, the method for adjusting the tuning frequency of a tuning circuit including the steps of: finding control data bi for a desired tuning frequency from control data bi for a tuning frequency equal to a first frequency and control data bi for a tuning frequency equal to a second frequency; and applying the control data bi found for the desired tuning frequency to the switch devices Qi.

Abstract: In order to improve various characteristics of a receiving circuit for digital radio services, circuits are provided for forming two local oscillation signals, whose frequencies are both the center frequency between a first ensemble and a second ensemble, and whose phases differ by 90° from each other. Furthermore, there are provided mixer circuits for frequency-converting the received signal into intermediate frequency signals in accordance with the local oscillation signals, phase-shift circuits to which the intermediate frequency signals are supplied, and an addition/subtraction circuit for performing one of addition and subtraction of they outputs of the phase-shift circuits. In addition, there are provided intermediate frequency filters to which the output signal of the addition/subtraction circuit is supplied and demodulation circuits to which the output signals of the intermediate frequency filters are supplied.