Patents by Inventor Taizo Shirai

Taizo Shirai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140010364
    Abstract: A cryptographic processing unit divides and inputs constituent bits of data to be subjected to data processing to lines, and repeatedly performs a data converting operation using round functions on the data of the respective lines. The cryptographic processing unit inputs n/d-bit data obtained by dividing n-bit data as input data by a division number d to each line, and repeatedly performs a round calculation including a data converting operation using round functions. The n/d-bit data in each line having output data of the round calculations is divided into d/2 sets of data, and the divided data are combined to restructure d sets of n/d-bit data that are different from the output data of the round calculations of the previous stage. The restructured data is set as input data for round calculations of the next stage. The cryptographic processing realizes improved diffusion properties and a high level of security.
    Type: Application
    Filed: February 20, 2012
    Publication date: January 9, 2014
    Applicant: SONY CORPORATION
    Inventors: Kyoji Shibutani, Toru Akishita, Takanori Isobe, Taizo Shirai, Harunaga Hiwatari, Atsushi Mitsuda
  • Publication number: 20140012862
    Abstract: An information processing apparatus includes a calculation unit and a generation unit. The calculation unit is configured to calculate a frequency function which is a function relating to an appearance frequency of one or more attribute values of a database having a predetermined attribute and the one or more attribute values relating to the attribute. The generation unit is configured to generate sample data in accordance with the appearance frequency relating to the database on the basis of the frequency function calculated, the sample data including at least a part of the one or more attribute values as one or more sample attribute values.
    Type: Application
    Filed: May 28, 2013
    Publication date: January 9, 2014
    Inventors: Yohei KAWAMOTO, Taizo SHIRAI, Kazuya KAMIO, Yu TANAKA, Koichi SAKUMOTO
  • Publication number: 20140003603
    Abstract: A miniaturized non-linear conversion unit is achieved. Included is an encryption processing part configured to divide and input configuration bits of data to be processed into a plurality of lines, and to repeatedly execute a data conversion processing applying a round function as to the data in each line, wherein the encryption processing part includes an F function executing unit configured to input one line of data configuring the plurality of lines, and to generate conversion data, wherein the F function executing unit includes a non-linear conversion processing unit configured to execute a non-linear conversion processing, and wherein the non-linear conversion processing unit includes a repeating structure of a non-linear calculation unit made up from either one NAND or NOR, and either one XOR or XNOR calculation unit, and a bit replacement unit. The miniaturized non-linear conversion unit is achieved by this repeating configuration.
    Type: Application
    Filed: February 20, 2012
    Publication date: January 2, 2014
    Applicant: Sony Corporation
    Inventors: Kyoji Shibutani, Toru Akishita, Takanori Isobe, Taizo Shirai, Harunaga Hiwatari, Atsushi Mitsuda
  • Publication number: 20130343546
    Abstract: An encryption processing device including an encryption processing part configured to divide configuration bits of data to be data processed into plural lines, and to input, and to repeatedly execute data conversion processing applying a round function to each line of data as a round calculation; and a key scheduling part configured to output round keys to a round calculation executing unit in the encryption processing part. The key scheduling part is a replacement type key scheduling part configured to generate plural round keys or round key configuration data by dividing a secret key stored beforehand into plural parts. The plural round keys are output to a round calculation executing unit sequentially executing in the encryption processing part such that a constant sequence is not repeated. The encryption processing configuration has a high level of security and a high level of resistance to repeated key attacks or other attacks.
    Type: Application
    Filed: February 20, 2012
    Publication date: December 26, 2013
    Applicant: SONY CORPORATION
    Inventors: Kyoji Shibutani, Atsushi Mitsuda, Toru Akishita, Takanori Isobe, Taizo Shirai, Harunaga Hiwatari
  • Publication number: 20130339753
    Abstract: Miniaturization of an encryption processing configuration is achieved. Included is an encryption processing unit configured to divide and input configuration bits of data to be data processed into a plurality of lines, and to repeatedly execute data conversion processing of data for each line, wherein the encryption processing unit includes an F function execution unit to input data from one line configuring the plurality of lines and generate converted data, an XOR calculation unit to execute an XOR calculation with other lines of data corresponding to the output from the F function, an intermediate data storage register to store intermediate data during the process of generating converted data in the F function execution unit, and an inverse calculation executing unit to calculate input data regarding the F function execution unit on the basis of the data stored in the intermediate storage register.
    Type: Application
    Filed: February 20, 2012
    Publication date: December 19, 2013
    Applicant: SONY CORPORATION
    Inventors: Kyoji Shibutani, Toru Akishita, Takanori Isobe, Taizo Shirai, Harunaga Hiwatari, Atsushi Mitsuda
  • Publication number: 20130297930
    Abstract: Provided is an authentication device including a key setting unit for setting s?Kn to a secret key and setting a multi-order polynomial fi(x1, . . . , xn) (i=1 to m) on a ring K and yi=fi(s) to a public key, a message transmission unit for transmitting a message c to a verifier, a verification pattern reception unit for receiving information on one verification pattern selected by the verifier from k (k?3) verification patterns for one message c, and a response transmission unit for transmitting, to the verifier, response information, among k types of response information, corresponding to the information on the verification pattern received by the verification pattern reception unit, where the response information is information that enables calculation of the secret key s in a case all of the k verification patterns for the message c performed by using the k types of response information have been successful.
    Type: Application
    Filed: July 3, 2013
    Publication date: November 7, 2013
    Applicant: Sony Corporation
    Inventors: Koichi Sakumoto, Taizo Shirai, Harunaga Hiwatari
  • Patent number: 8577023
    Abstract: A common-key blockcipher processing configuration with enhanced immunity against attacks such as saturation attacks and algebraic attacks (XSL attacks) is realized. In an encryption processing apparatus that performs common-key blockcipher processing, S-boxes serving as non-linear transformation processing parts set in round-function executing parts are configured using at least two different types of S-boxes. With this configuration, the immunity against saturation attacks can be enhanced. Also, types of S-boxes present a mixture of different types. With this configuration, the immunity against algebraic attacks (XSL attacks) can be enhanced, thereby realizing a highly secure encryption processing apparatus.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: November 5, 2013
    Assignee: Sony Corporation
    Inventors: Taizo Shirai, Kyoji Shibutani, Toru Akishita, Shiho Moriai
  • Publication number: 20130289977
    Abstract: There is provided an information processing device including an acquisition unit that acquires a first word input by a user, and a presentation unit that presents second words for replacing the first word when the first word is acquired by the acquisition unit.
    Type: Application
    Filed: March 21, 2013
    Publication date: October 31, 2013
    Applicant: SONY CORPORATION
    Inventors: Yu TANAKA, Yohei KAWAMOTO, Koichi SAKUMOTO, Kazuya KAMIO, Taizo SHIRAI
  • Patent number: 8538887
    Abstract: In a content delivery system, delivery of content and charging the fee of the content are performed and managed in a highly secure and effective fashion. If a content-purchasing request is transmitted from a user device to a shop server, a charging process is performed. A user device authentication server, which manages content delivery, converts an encrypted content key KpDAS(Kc) encrypted using a public key of the user device authentication server (DAS) into an encrypted content key KpDEV(Kc) encrypted using a public key KpDEV of the user device. If the charging process is successfully completed, the shop server transmits, to the user device, the encrypted content key KpDEV(Kc).
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: September 17, 2013
    Assignee: Sony Computer Entertainment Inc.
    Inventors: Kenji Yoshino, Yoshihito Ishibashi, Toru Akishita, Taizo Shirai, Makoto Oka, Masaharu Yoshimori
  • Patent number: 8522033
    Abstract: Provided is an authentication device including a key setting unit for setting s?Kn to a secret key and setting a multi-order polynomial fi(x1, . . . , xn) (i=1 to m) on a ring K and yi=fi(s) to a public key, a message transmission unit for transmitting a message c to a verifier, a verification pattern reception unit for receiving information on one verification pattern selected by the verifier from k (k?3) verification patterns for one message c, and a response transmission unit for transmitting, to the verifier, response information, among k types of response information, corresponding to the information on the verification pattern received by the verification pattern reception unit, where the response information is information that enables calculation of the secret key s in a case all of the k verification patterns for the message c performed by using the k types of response information have been successful.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: August 27, 2013
    Assignee: Sony Corporation
    Inventors: Koichi Sakumoto, Taizo Shirai, Harunaga Hiwatari
  • Publication number: 20130219185
    Abstract: Provided is an authentication device including a key setting unit for setting a multi-order polynomial ui(t) (i=1 to n?1) to a secret key and setting a multi-order polynomial f that satisfies f(u1(t), . . . , un-1(t),t)=0 to a public key, a message transmission unit for transmitting a message c to a verifier, a verification pattern reception unit for receiving information on one verification pattern selected by the verifier from k (k?3) verification patterns for one message c, and a response transmission unit for transmitting, to the verifier, response information, among k types of response information, corresponding to the information on the verification pattern received by the verification pattern reception unit. The response information is information that enables calculation of the secret key ui in a case all of the k verification patterns for the message c performed by using the k types of response information have been successful.
    Type: Application
    Filed: April 2, 2013
    Publication date: August 22, 2013
    Applicant: Sony Corporation
    Inventors: Koichi SAKUMO, Taizo Shirai, Harunaga Hiwatari
  • Publication number: 20130159264
    Abstract: There is realized a data conversion device that performs generation of a hash value with improved analysis resistance and a high degree of safety. There are provided a stirring processing section performing a data stirring process on input data; and a compression processing section performing a data compression process on input data including data segments which are divisions of message data, the message data being a target of a data conversion. Part of multi-stage compression subsections is configured to perform a data compression process based on both of output of the stirring processing section and the data segments in the message data. There is provided such a configuration that the stirring process is executed at least on fixed timing of a compression processing round of plural rounds and thus, there is realized a data conversion device that performs generation of a hash value with improved analysis resistance and a high degree of safety.
    Type: Application
    Filed: February 14, 2013
    Publication date: June 20, 2013
    Inventors: TAIZO SHIRAI, KYOJI SHIBUTANI, SHIHO MORIAI, TORU AKISHITA, TETSU IWATA
  • Patent number: 8433912
    Abstract: Provided is an authentication device including a key setting unit for setting a multi-order polynomial ui(t) (i=1 to n?1) to a secret key and setting a multi-order polynomial f that satisfies f(u1(t), . . . , un-1(t),t)=0 to a public key, a message transmission unit for transmitting a message c to a verifier, a verification pattern reception unit for receiving information on one verification pattern selected by the verifier from k (k?3) verification patterns for one message c, and a response transmission unit for transmitting, to the verifier, response information, among k types of response information, corresponding to the information on the verification pattern received by the verification pattern reception unit. The response information is information that enables calculation of the secret key ui in a case all of the k verification patterns for the message c performed by using the k types of response information have been successful.
    Type: Grant
    Filed: May 20, 2011
    Date of Patent: April 30, 2013
    Assignee: Sony Corporation
    Inventors: Koichi Sakumoto, Taizo Shirai, Harunaga Hiwatari
  • Publication number: 20130089201
    Abstract: Provided is an authentication device including a key holding unit for holding L (L?2) secret keys si (i=1 to L) and L public keys yi that satisfy yi=F(si) with respect to a set F of multivariate polynomials of n-th order (n?2), and an interactive protocol execution unit for performing, with a verifier, an interactive protocol for proving knowledge of (L?1) secret keys si that satisfy yi=F(si). The interactive protocol execution unit includes a challenge reception unit for receiving L challenges Chi from the verifier, a challenge selection unit for arbitrarily selecting (L?1) challenges Chi from the L challenges Chi received by the challenge reception unit, a response generation unit for generating, by using the secret keys si, (L?1) responses Rspi respectively for the (L?1) challenges Chi selected by the challenge selection unit, and a response transmission unit for transmitting the (L?1) responses Rspi generated by the response generation unit to the verifier.
    Type: Application
    Filed: July 12, 2011
    Publication date: April 11, 2013
    Applicant: SONY CORPORATION
    Inventors: Koichi Sakumoto, Taizo Shirai, Harunaga Hiwatari
  • Publication number: 20130083920
    Abstract: A data conversion algorithm achieving efficient data diffusion is achieved. For example, in a configuration where a various processes are executed on two data segments which are resultants of dividing a rectangular matrix of data containing arranged one-byte data blocks into two parts to perform data conversion, efficient data scrambling with less operation cost is achieved by executing a linear conversion process on one of the data segments, an exclusive OR operation between the two data segments, a shift process on one of the data segments, and a swap process between the two data segments. Moreover, cryptographic processing with a high security level is achieved by including nonlinear conversion or key application operation on the data segments.
    Type: Application
    Filed: November 27, 2012
    Publication date: April 4, 2013
    Inventors: Taizo Shirai, Kyoji Shibutani, Shiho Moriai, Toru Akishita, Tetsu Iwata
  • Patent number: 8396210
    Abstract: A configuration that efficiently executes cryptographic processing to which a plurality of different F-functions are applied is provided. In a configuration that executes cryptographic processing by performing round operations to which different F-functions are selectively applied, a plurality of F-function correspondence tables, each corresponding to one of the F-functions, in which input values and output values or intermediate values are associated with each other are stored in a memory; in accordance with a prescribed cryptographic processing sequence, addresses corresponding to F-functions for the respective rounds are applied to read F-function correspondence tables from the memory; and output values or intermediate values for input values are acquired on the basis of reference to the tables to obtain data transformation results in accordance with the respective F-functions.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: March 12, 2013
    Assignee: Sony Corporation
    Inventors: Kyoji Shibutani, Taizo Shirai, Toru Akishita, Shiho Moriai
  • Patent number: 8380683
    Abstract: There is realized a data conversion device that performs generation of a hash value with improved analysis resistance and a high degree of safety. There are provided a stirring processing section performing a data stirring process on input data; and a compression processing section performing a data compression process on input data including data segments which are divisions of message data, the message data being a target of a data conversion. Part of multi-stage compression subsections is configured to perform a data compression process based on both of output of the stirring processing section and the data segments in the message data. There is provided such a configuration that the stirring process is executed at least on fixed timing of a compression processing round of plural rounds and thus, there is realized a data conversion device that performs generation of a hash value with improved analysis resistance and a high degree of safety.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: February 19, 2013
    Assignee: Sony Corporation
    Inventors: Taizo Shirai, Kyoji Shibutani, Shiho Moriai, Toru Akishita, Tetsu Iwata
  • Patent number: 8375206
    Abstract: A data processing system, recording device, data processing method and program providing medium are provided to execute authentication processing and content storing processing between apparatuses. Program localization is employed to restrict access to program content. A plurality of key blocks store key data for authentication processing. Key block designation information is set in a recorder/reproducer, which is configured for executing authentication processing with the recording device by designating a key block. The recorder/reproducer can set a key block for each product, model or the like. In addition, data stored according to a selected key block cannot be utilized in a recorder/reproducer in which a different key block is set. Furthermore, an encryption processing controlling section of a recording device executes control in accordance with a pre-defined setting sequence.
    Type: Grant
    Filed: February 22, 2010
    Date of Patent: February 12, 2013
    Assignees: Sony Corporation, Sony Computer Entertainment Inc.
    Inventors: Tomoyuki Asano, Yoshihito Ishibashi, Taizo Shirai, Toru Akishita, Masaharu Yoshimori, Makoto Tanaka
  • Patent number: 8369522
    Abstract: A common-key blockcipher processing structure that makes analysis of key more difficult and enhances security and implementation efficiency is realized. In a key scheduling part in an encryption processing apparatus that performs common-key blockcipher processing, a secret key is input to an encryption function including a round function employed in an encryption processing part to generate an intermediate key, and the result of performing bijective transformation based on the intermediate key, the secret key, and the like and the result of performing an exclusive-OR operation on the bijective-transformed data are applied to round keys. With this structure, generation of round keys based on the intermediate key generated using the encryption function whose security has been ensured is performed, thereby making it possible to make analysis of the keys more difficult. The structure of the key scheduling part can be simplified, thereby making it possible to improve the implementation efficiency.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: February 5, 2013
    Assignee: Sony Corpoation
    Inventors: Taizo Shirai, Kyoji Shibutani, Toru Akishita, Shiho Moriai
  • Publication number: 20130016829
    Abstract: There is provided a highly secure cryptographic processing apparatus and method where an analysis difficulty is increased. In a Feistel type common key block encrypting process in which an SPN type F function having a nonlinear conversion section and a linear conversion section is repeatedly executed a plurality of rounds. The linear conversion process of an F function corresponding to each of the plurality of rounds is performed as a linear conversion process which employs an MDS (Maximum Distance Separable) matrix, and a linear conversion process is carried out which employs a different MDS matrix at least at each of consecutive odd number rounds and consecutive even number rounds. This structure makes it possible to increase the minimum number (a robustness index against a differential attack in common key block encryption) of the active S box in the entire encrypting function.
    Type: Application
    Filed: September 6, 2012
    Publication date: January 17, 2013
    Inventors: Taizo Shirai, Koji Shibutani