Patents by Inventor Tak Hung

Tak Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230172926
    Abstract: The application pertains to pharmaceutical combinations of orally administered paclitaxel and a P-gp inhibitor. The pharmaceutical combinations are suitable for the treatment of cancer in a subject and for reducing or preventing toxicity, hypersensitivity-type infusion reactions, and other negative outcomes resulting from or associated with intravenously administered paclitaxel (e.g., Taxol® or paclitaxel formulated with Cremophor®) therapy in a subject suffering from cancer.
    Type: Application
    Filed: October 4, 2022
    Publication date: June 8, 2023
    Inventors: Min-Fun Rudolf KWAN, E. Douglas KRAMER, Gerald J. FETTERLY, JR., Cheung-Tak HUNG, Christopher Glyn Charles Alexander JACKSON, Paul William GLUE
  • Publication number: 20180207148
    Abstract: The application pertains to pharmaceutical combinations of orally administered paclitaxel and a P-gp inhibitor. The pharmaceutical combinations are suitable for the treatment of cancer in a subject and for reducing or preventing toxicity, hypersensitivity-type infusion reactions, and other negative outcomes resulting from or associated with intravenously administered paclitaxel (e.g., Taxol® or paclitaxel formulated with Cremophor®) therapy in a subject suffering from cancer.
    Type: Application
    Filed: July 21, 2016
    Publication date: July 26, 2018
    Inventors: Min-Fun Rudolf KWAN, E. Douglas KRAMER, Gerald J. FETTERLY, Jr., Cheung-Tak HUNG, Christopher Glyn Charles Alexander JACKSON, Paul William GLUE
  • Patent number: 8557693
    Abstract: A method of forming a low resistance contact structure in a semiconductor device includes forming a doped semiconductor region in a semiconductor substrate; forming a deep level impurity region at an upper portion of the doped semiconductor region; activating dopants in both the doped semiconductor region and the deep level impurity region by annealing; and forming a metal contact over the deep level impurity region so as to create a metal-semiconductor interface therebetween.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: October 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: Tak Hung Ning, Zhen Zhang
  • Publication number: 20110298056
    Abstract: A method of forming a low resistance contact structure in a semiconductor device includes forming a doped semiconductor region in a semiconductor substrate; forming a deep level impurity region at an upper portion of the doped semiconductor region; activating dopants in both the doped semiconductor region and the deep level impurity region by annealing; and forming a metal contact over the deep level impurity region so as to create a metal-semiconductor interface therebetween.
    Type: Application
    Filed: June 3, 2010
    Publication date: December 8, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tak Hung Ning, Zhen Zhang
  • Patent number: 7993829
    Abstract: Human hPRP4 genes are identified as modulators of the p53 pathway, and thus are therapeutic targets for disorders associated with defective p53 function. Methods for identifying modulators of p53, comprising screening for agents that modulate the activity of hPRP4 are provided.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: August 9, 2011
    Assignee: Exelixis Inc.
    Inventors: Lori Friedman, Gregory D. Plowman, Tak Hung, Helen Francis-Lang, Danix Li, Roel P. Funke, Michael Costa
  • Publication number: 20110101440
    Abstract: A CMOS device includes a silicon substrate and an electrical insulator formed over the silicon substrate. The device also includes an access pFET formed over the electrical insulator and a first gate stack and a storage pFET formed over the electrical insulator, the storage pFET including a second source region that is co-formed with the first drain region, a second channel region, and a second drain region. The device also includes a second gate stack including a second dielectric layer formed above the second channel region and a floating gate electrode formed above the second gate dielectric layer.
    Type: Application
    Filed: November 5, 2009
    Publication date: May 5, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jin Cai, Brian L. Ji, Tak Hung Ning
  • Patent number: 7867866
    Abstract: An SOI FET device with improved floating body is proposed. Control of the body potential is accomplished by having a body doping concentration next to the source electrode higher than the body doping concentration next to the drain electrode. The high source-side dopant concentration leads to elevated forward leakage current between the source electrode and the body, which leakage current effectively locks the body potential to the source electrode potential. Furthermore, having the source-to-body junction capacitance larger than the drain-to-body junction capacitance has additional advantages in device operation. The device has no structure fabricated for the purpose of electrically connecting the body potential to other elements of the device.
    Type: Grant
    Filed: January 4, 2010
    Date of Patent: January 11, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jin Cai, Tak Hung Ning
  • Publication number: 20100105175
    Abstract: An SOI FET device with improved floating body is proposed. Control of the body potential is accomplished by having a body doping concentration next to the source electrode higher than the body doping concentration next to the drain electrode. The high source-side dopant concentration leads to elevated forward leakage current between the source electrode and the body, which leakage current effectively locks the body potential to the source electrode potential. Furthermore, having the source-to-body junction capacitance larger than the drain-to-body junction capacitance has additional advantages in device operation. The device has no structure fabricated for the purpose of electrically connecting the body potential to other elements of the device.
    Type: Application
    Filed: January 4, 2010
    Publication date: April 29, 2010
    Applicant: International Business Machines Corporation
    Inventors: Jin Cai, Tak Hung Ning
  • Patent number: 7655983
    Abstract: An SOI FET device with improved floating body is proposed. Control of the body potential is accomplished by having a body doping concentration next to the source electrode higher than the body doping concentration next to the drain electrode. The high source-side dopant concentration leads to elevated forward leakage current between the source electrode and the body, which leakage current effectively locks the body potential to the source electrode potential. Furthermore, having the source-to-body junction capacitance larger than the drain-to-body junction capacitance has additional advantages in device operation. The device has no structure fabricated for the purpose of electrically connecting the body potential to other elements of the device.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: February 2, 2010
    Assignee: International Business Machines Corporation
    Inventors: Jin Cai, Tak Hung Ning
  • Publication number: 20080296676
    Abstract: An SOI FET device with improved floating body is proposed. Control of the body potential is accomplished by having a body doping concentration next to the source electrode higher than the body doping concentration next to the drain electrode. The high source-side dopant concentration leads to elevated forward leakage current between the source electrode and the body, which leakage current effectively locks the body potential to the source electrode potential. Furthermore, having the source-to-body junction capacitance larger than the drain-to-body junction capacitance has additional advantages in device operation. The device has no structure fabricated for the purpose of electrically connecting the body potential to other elements of the device.
    Type: Application
    Filed: June 4, 2007
    Publication date: December 4, 2008
    Inventors: Jin Cai, Tak Hung Ning
  • Publication number: 20080241131
    Abstract: Human SPHK genes are identified as modulators of the p53 pathway, and thus are therapeutic targets for disorders associated with defective p53 function. Methods for identifying modulators of p53, comprising screening for agents that modulate the activity of SPHK are provided.
    Type: Application
    Filed: April 3, 2008
    Publication date: October 2, 2008
    Applicant: Exelixis Inc.
    Inventors: Lori S. Friedman, Gregory D. Plowman, Michael R. Costa, Danxi Li, Roel P. Funke, Tak Hung
  • Patent number: 7244976
    Abstract: A low programming power, high speed EEPROM device is disclosed which is adapted for large scale integration. The device comprises a body, a source, a drain, and it has means for injecting a programming current into the body. The hot carriers from the body enter the floating gate with much higher efficiency than channel current carriers are capable of doing. The drain current of this device is controlled by the body bias. The device is built on an insulator, with a bottom common plate, and a top side body. These features make the device ideal for SOI and thin film technologies.
    Type: Grant
    Filed: January 25, 2005
    Date of Patent: July 17, 2007
    Assignee: International Business Machines Corporation
    Inventors: Jin Cai, Tak Hung Ning
  • Publication number: 20070160539
    Abstract: Human hPRP4 genes are identified as modulators of the p53 pathway, and thus are therapeutic targets for disorders associated with defective p53 function. Methods for identifying modulators of p53, comprising screening for agents that modulate the activity of hPRP4 are provided.
    Type: Application
    Filed: January 26, 2007
    Publication date: July 12, 2007
    Applicant: EXELIXIS, INC.
    Inventors: Lori Friedman, Gregory Plowman, Tak Hung, Helen Francis-Lang, Danxi Li, Roel Funke, Michael Costa
  • Patent number: 7170112
    Abstract: A bipolar transistor structure and process technology is described incorporating a emitter, a base, and a collector, with most of the intrinsic base adjacent the collector having a graded energy bandgap and a layer of the intrinsic base adjacent the emitter having a substantially constant energy bandgap. The invention has a smaller base transit time than a conventional graded-base-bandgap bipolar transistor.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: January 30, 2007
    Assignee: International Business Machines Corporation
    Inventor: Tak Hung Ning
  • Publication number: 20060252035
    Abstract: Human SPHK genes are identified as modulators of the p53 pathway, and thus are therapeutic targets for disorders associated with defective p53 function. Methods for identifying modulators of p53, comprising screening for agents that modulate the activity of SPHK are provided.
    Type: Application
    Filed: August 2, 2002
    Publication date: November 9, 2006
    Inventors: Lori Friedman, Gregory Plowman, Michael Costa, Danxi Li, Roel Funke, Tak Hung
  • Publication number: 20060084063
    Abstract: Human RAB genes are identified as modulators of the p53 pathway, and thus are therapeutic targets for disorders associated with defective p53 function. Methods for identifying modulators of p53, comprising screening for agents that modulate the activity of RAB are provided.
    Type: Application
    Filed: July 9, 2003
    Publication date: April 20, 2006
    Inventors: Michael Costa, Mark Maxwell, Mark Lackner, Tak Hung, Carol OBrien, Timothy Heuer, Kim Lickteig
  • Patent number: 6949764
    Abstract: A bipolar transistor structure is described incorporating an emitter, base, and collector having a fully depleted region on an insulator of a Silicon-On-Insulator (SOI) substrate without the need for a highly doped subcollector to permit the fabrication of vertical bipolar transistors on semiconductor material having a thickness of 300 nm or less and to permit the fabrication of SOI BiCMOS. The invention overcomes the problem of requiring a thick semiconductor layer in SOI to fabricate vertical bipolar transistors with low collector resistance.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: September 27, 2005
    Assignee: International Business Machines Corporation
    Inventor: Tak Hung Ning
  • Patent number: 6870213
    Abstract: A low programming power, high speed EEPROM device is disclosed which is adapted for large scale integration. The device comprises a body, a source, a drain, and it has means for injecting a programming current into the body. The hot carriers from the body enter the floating gate with much higher efficiency than channel current carriers are capable of doing. The drain current of this device is controlled by the body bias. The device is built on an insulator, with a bottom common plate, and a top side body. These features make the device ideal for SOI and thin film technologies.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: March 22, 2005
    Assignee: International Business Machines Corporation
    Inventors: Jin Cai, Tak Hung Ning
  • Patent number: 6849871
    Abstract: A bipolar transistor structure is described incorporating an emitter, base, and collector having a fully depleted region on an insulator of a Silicon-On-Insulator (SOI) substrate without the need for a highly doped subcollector to permit the fabrication of vertical bipolar transistors on semiconductor material having a thickness of 300 nm or less and to permit the fabrication of SOI BiCMOS. The invention overcomes the problem of requiring a thick semiconductor layer in SOI to fabricate vertical bipolar transistors with low collector resistance.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: February 1, 2005
    Assignee: International Business Machines Corporation
    Inventor: Tak Hung Ning
  • Publication number: 20040222941
    Abstract: A novel architecture for displaying images with multiple display devices uses only a single video display controller and single frame buffer regardless of how many display devices are included. The architecture can use a Time Division Multiplex Image Display (TDMID) algorithm for controlling the timing and data flow of the video display controller. The TDMID algorithm provides a simple way to send a divided image to different display devices by sharing line buffers, and thus eliminates the need for additional components as more display devices are added to a system. The novel architecture reduces overall system cost without sacrificing performance.
    Type: Application
    Filed: December 30, 2003
    Publication date: November 11, 2004
    Inventors: Mark Yuk-Lun Wong, Raymond Moon-Yeung Wong, Thomas Tak Hung