Patents by Inventor Tak-Yung Kim

Tak-Yung Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8461904
    Abstract: A switching device includes a first switch disposed between a power source voltage and an intermediate node, the first switch forming a current path on the basis of an input signal, a second switch disposed between the intermediate node and a ground, the second switch forming a current path on the basis of a voltage of the intermediate node, and a transmission gate receiving the input signal, the transmission gate outputting the input signal on the basis of the voltage of the intermediate node.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: June 11, 2013
    Assignees: Samsung Electronics Co., Ltd., SNU R&DB Foundation
    Inventors: Tak-Yung Kim, Taewhan Kim
  • Publication number: 20110234285
    Abstract: A switching device includes a first switch disposed between a power source voltage and an intermediate node, the first switch forming a current path on the basis of an input signal, a second switch disposed between the intermediate node and a ground, the second switch forming a current path on the basis of a voltage of the intermediate node, and a transmission gate receiving the input signal, the transmission gate outputting the input signal on the basis of the voltage of the intermediate node.
    Type: Application
    Filed: March 24, 2011
    Publication date: September 29, 2011
    Inventors: Tak-Yung Kim, Taewhan Kim
  • Patent number: 7408371
    Abstract: An apparatus for measuring on-chip characteristics in a semiconductor circuit is provided. The apparatus for measuring the on-chip characteristics includes an oscillation unit, a timing test unit, and a selection unit. The oscillation unit is configured to selectively output a first oscillation signal responsive to a first control signal. The timing test unit is configured to generate a second oscillation signal using an input clock signal, generate a pulse from the second oscillation signal responsive to a second control signal, and determine whether an operating time violation has occurred based on a comparison of the second oscillation signal and the pulse. The selection unit is configured to select one of the output of the oscillation unit and the output of the timing test unit responsive to a test mode signal.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: August 5, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tak-Yung Kim, Jin-Yong Lee, Shin-Mo Kang
  • Publication number: 20080040091
    Abstract: A method of simulating a semiconductor integrated circuit (IC) at gate level includes providing a net list including information about a variable power source and a variable ground source, providing a circuit model including the variable power source and the variable ground source, and simulating the net list by using the circuit model at gate level.
    Type: Application
    Filed: July 11, 2007
    Publication date: February 14, 2008
    Inventors: Tak-Yung Kim, Sun-Yung Jang, Hyoung-Soo Song
  • Publication number: 20070080701
    Abstract: An apparatus for measuring on-chip characteristics in a semiconductor circuit is provided. The apparatus for measuring the on-chip characteristics includes an oscillation unit, a timing test unit, and a selection unit. The oscillation unit is configured to selectively output a first oscillation signal responsive to a first control signal. The timing test unit is configured to generate a second oscillation signal using an input clock signal, generate a pulse from the second oscillation signal responsive to a second control signal, and determine whether an operating time violation has occurred based on a comparison of the second oscillation signal and the pulse. The selection unit is configured to select one of the output of the oscillation unit and the output of the timing test unit responsive to a test mode signal.
    Type: Application
    Filed: May 2, 2006
    Publication date: April 12, 2007
    Inventors: Tak-Yung Kim, Jin-Yong Lee, Shin-Mo Kang