Patents by Inventor TAKAAKI KODAIRA

TAKAAKI KODAIRA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11876055
    Abstract: A semiconductor device, including: a semiconductor substrate formed of silicon carbide, components being formed at one surface of the semiconductor substrate; a periphery portion disposed at a pre-specified region of a periphery of the semiconductor substrate, the components not being formed at the periphery portion; and a plurality of trenches or portions of trenches formed at the periphery portion, an interior of each of the trenches being filled with a material with a different coefficient of thermal expansion from the silicon carbide.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: January 16, 2024
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Kenichi Furuta, Masao Tsujimoto, Nobuhiro Terada, Masahiro Haraguchi, Tsuyoshi Inoue, Yuuichi Kaneko, Hiroki Kuroki, Takaaki Kodaira
  • Publication number: 20220130772
    Abstract: A semiconductor device, including: a semiconductor substrate formed of silicon carbide, components being formed at one surface of the semiconductor substrate; a periphery portion disposed at a pre-specified region of a periphery of the semiconductor substrate, the components not being formed at the periphery portion; and a plurality of trenches or portions of trenches formed at the periphery portion, an interior of each of the trenches being filled with a material with a different coefficient of thermal expansion from the silicon carbide.
    Type: Application
    Filed: October 21, 2021
    Publication date: April 28, 2022
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi FURUTA, Masao TSUJIMOTO, Nobuhiro TERADA, Masahiro HARAGUCHI, Tsuyoshi INOUE, Yuuichi KANEKO, Hiroki KUROKI, Takaaki KODAIRA
  • Patent number: 9627477
    Abstract: A semiconductor device includes a semiconductor substrate, an element isolating trench structure that includes an element isolating trench formed in one main surface of the semiconductor substrate, an insulating material that is formed within the element isolating trench, element formation regions that are surrounded by the element isolating trench, and semiconductor elements that are respectively formed in the element formation regions. The element isolating trench includes first element isolating trenches extending in a first direction, second element isolating trenches extending in a second direction that are at a right angle to the first direction, and third element isolating trenches extending in a third direction inclined at an angle ? (0°<?<90°) from the first direction.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: April 18, 2017
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Takao Kaji, Katsuhito Sasaki, Takaaki Kodaira, Yuuki Doi, Minako Oritsu
  • Publication number: 20160260800
    Abstract: A semiconductor device includes a semiconductor substrate, an element isolating trench structure that includes an element isolating trench formed in one main surface of the semiconductor substrate, an insulating material that is formed within the element isolating trench, element formation regions that are surrounded by the element isolating trench, and semiconductor elements that are respectively formed in the element formation regions. The element isolating trench includes first element isolating trenches extending in a first direction, second element isolating trenches extending in a second direction that are at a right angle to the first direction, and third element isolating trenches extending in a third direction inclined at an angle ? (0°<?<90°) from the first direction.
    Type: Application
    Filed: May 17, 2016
    Publication date: September 8, 2016
    Inventors: TAKAO KAJI, KATSUHITO SASAKI, TAKAAKI KODAIRA, YUUKI DOI, MINAKO ORITSU
  • Patent number: 9368571
    Abstract: A semiconductor device includes a semiconductor substrate, an element isolating trench structure that includes an element isolating trench formed in one main surface of the semiconductor substrate, an insulating material that is formed within the element isolating trench, element formation regions that are surrounded by the element isolating trench, and semiconductor elements that are respectively formed in the element formation regions. The element isolating trench includes first element isolating trenches extending in a first direction, second element isolating trenches extending in a second direction that are at a right angle to the first direction, and third element isolating trenches extending in a third direction inclined at an angle ? (0°<?<90°) from the first direction.
    Type: Grant
    Filed: April 10, 2015
    Date of Patent: June 14, 2016
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Takao Kaji, Katsuhito Sasaki, Takaaki Kodaira, Yuuki Doi, Minako Oritsu
  • Publication number: 20150214298
    Abstract: A semiconductor device includes a semiconductor substrate, an element isolating trench structure that includes an element isolating trench formed in one main surface of the semiconductor substrate, an insulating material that is formed within the element isolating trench, element formation regions that are surrounded by the element isolating trench, and semiconductor elements that are respectively formed in the element formation regions. The element isolating trench includes first element isolating trenches extending in a first direction, second element isolating trenches extending in a second direction that are at a right angle to the first direction, and third element isolating trenches extending in a third direction inclined at an angle ? (0°<?<90°) from the first direction.
    Type: Application
    Filed: April 10, 2015
    Publication date: July 30, 2015
    Inventors: TAKAO KAJI, KATSUHITO SASAKI, TAKAAKI KODAIRA, YUUKI DOI, MINAKO ORITSU
  • Patent number: 9029980
    Abstract: A semiconductor device includes a semiconductor substrate, an element isolating trench structure that includes an element isolating trench formed in one main surface of the semiconductor substrate, an insulating material that is formed within the element isolating trench, element formation regions that are surrounded by the element isolating trench, and semiconductor elements that are respectively formed in the element formation regions. The element isolating trench includes first element isolating trenches extending in a first direction, second element isolating trenches extending in a second direction that are at a right angle to the first direction, and third element isolating trenches extending in a third direction inclined at an angle ? (0°<?<90°) from the first direction.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: May 12, 2015
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventors: Takao Kaji, Katsuhito Sasaki, Takaaki Kodaira, Yuuki Doi, Minako Oritsu
  • Patent number: 8742537
    Abstract: Disclosed is a semiconductor device including: a semiconductor substrate; first and second element isolating trenches that are formed in one main surface of the semiconductor substrate separately from each other; a first insulating material that is formed within the first element isolating trench; a plurality of first element formation regions that are surrounded by the first element isolating trench; first semiconductor elements that are respectively formed in the first element formation regions; a second insulating material that is formed within the second element isolating trench; a second element formation region that is surrounded by the second element isolating trench; a second semiconductor element that is formed in the second element formation region; and a stress relaxation structure that is formed between the first element isolating trench and the second element isolating trench.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: June 3, 2014
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventors: Takao Kaji, Katsuhito Sasaki, Takaaki Kodaira, Yuuki Doi, Minako Oritsu
  • Publication number: 20130334655
    Abstract: Disclosed is a semiconductor device including: a semiconductor substrate; first and second element isolating trenches that are formed in one main surface of the semiconductor substrate separately from each other; a first insulating material that is formed within the first element isolating trench; a plurality of first element formation regions that are surrounded by the first element isolating trench; first semiconductor elements that are respectively formed in the first element formation regions; a second insulating material that is formed within the second element isolating trench; a second element formation region that is surrounded by the second element isolating trench; a second semiconductor element that is formed in the second element formation region; and a stress relaxation structure that is formed between the first element isolating trench and the second element isolating trench.
    Type: Application
    Filed: June 5, 2013
    Publication date: December 19, 2013
    Inventors: TAKAO KAJI, KATSUHITO SASAKI, TAKAAKI KODAIRA, YUUKI DOI, MINAKO ORITSU
  • Publication number: 20130334654
    Abstract: Disclosed is a semiconductor device including: a semiconductor substrate, an element isolating trench structure that includes an element isolating trench formed in one main surface of the semiconductor substrate, an insulating material that is formed within the element isolating trench, element formation regions that are surrounded by the element isolating trench, and semiconductor elements that are respectively formed in the element formation regions. The element isolating trench includes first element isolating trenches extending in a first direction, second element isolating trenches extending in a second direction that are at a right angle to the first direction, and third element isolating trenches extending in a third direction inclined at an angle ? (0°<?<90°) from the first direction.
    Type: Application
    Filed: June 5, 2013
    Publication date: December 19, 2013
    Inventors: TAKAO KAJI, KATSUHITO SASAKI, TAKAAKI KODAIRA, YUUKI DOI, MINAKO ORITSU