Abstract: The present invention provides a driving circuit of a switching transistor, the driving circuit capable of suppressing an output voltage from changing sharply. A driver circuit includes a first transistor to a fourth transistor and a pre-driver. The pre-driver (i) provides a first gate signal having a negative edge slope smaller than a positive edge slope to the gate of the first transistor, (ii) provides a second gate signal having a positive edge slope smaller than a negative edge slope to the gate of the second transistor, (iii) provides a third gate signal having a positive edge slope smaller than the positive edge slope of the first gate signal to the gate of the third transistor, and (iv) provides a fourth gate signal having a negative edge slope smaller than the negative edge slope of the second gate signal to the gate of the fourth transistor.

Abstract: The present invention provides a driving circuit of a switching transistor, the driving circuit capable of suppressing an output voltage from changing sharply. A driver circuit includes a first transistor to a fourth transistor and a pre-driver. The pre-driver (i) provides a first gate signal having a negative edge slope smaller than a positive edge slope to the gate of the first transistor, (ii) provides a second gate signal having a positive edge slope smaller than a negative edge slope to the gate of the second transistor, (iii) provides a third gate signal having a positive edge slope smaller than the positive edge slope of the first gate signal to the gate of the third transistor, and (iv) provides a fourth gate signal having a negative edge slope smaller than the negative edge slope of the second gate signal to the gate of the fourth transistor.

Abstract: A gate driving circuit for turning on a high-side transistor when an input set pulse is asserted and turning off the high-side transistor when an input reset pulse is asserted is provided. The gate driving circuit includes first and second inverters to receive the intermediate set pulse from a level shift circuit to generate first and second set pulses; third and fourth inverters to receive the intermediate reset pulse from the level shift circuit to generate first and second reset pulses; a logic circuit to mask the first set pulse and the first reset pulse by using the second reset pulse and the second set pulse to generate an output set pulse and an output reset pulse, respectively; a flip-flop configured to receive the output set pulse and the output reset pulse to output a driving pulse; and a driver to drive the high-side transistor according to the driving pulse.

Abstract: A gate driving circuit for turning on a high-side transistor when an input set pulse is asserted and turning off the high-side transistor when an input reset pulse is asserted is provided. The gate driving circuit includes first and second inverters to receive the intermediate set pulse from a level shift circuit to generate first and second set pulses; third and fourth inverters to receive the intermediate reset pulse from the level shift circuit to generate first and second reset pulses; a logic circuit to mask the first set pulse and the first reset pulse by using the second reset pulse and the second set pulse to generate an output set pulse and an output reset pulse, respectively; a flip-flop configured to receive the output set pulse and the output reset pulse to output a driving pulse; and a driver to drive the high-side transistor according to the driving pulse.