Patents by Inventor Takafumi NOSE

Takafumi NOSE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11656920
    Abstract: A processing unit generates, in the initial setting of all-to-all communication between processes, a unique node-order process number for each process on the basis of hardware information, computes the virtual rank number of each process on the basis of the node-order process number of the process, and stores the computed virtual rank numbers in a storage unit. When performing the al-to-all communication between the processes, the processing unit determines the communication partner process of each process for the current step in the all-to-all communication by performing an exclusive OR operation between the virtual rank number of the process, stored in, the storage unit, and the step number of the current step. Then, the processing unit performs communication from each process to the corresponding communication partner process.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: May 23, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Akira Naribayashi, Takafumi Nose
  • Publication number: 20230018565
    Abstract: A battery module includes: a plurality of battery cells each of which has a flat shape; a plurality of elastic spacers laminated and disposed alternately with the battery cells; and a restraining member configured to restrain the battery cells and the elastic spacers in a laminating direction of the battery cells. Each of the elastic spacers has a sheet portion that extends between two adjacent battery cells and a plurality of protrusions that protrudes from one surface of the sheet portion. The protrusions are disposed at an equal interval along at least a first direction. When an interval between the protrusions in the first direction is x and a dimension of each protrusion in the first direction is y, relationships of 4 mm?y?18 mm, y?4/9x?10/3, and y?x?2 are satisfied.
    Type: Application
    Filed: May 24, 2022
    Publication date: January 19, 2023
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hiroki NAGAI, Takaaki MATSUI, Takafumi NOSE, Koichiro ISOBE, Ryo NOGIMURA, Kazuyuki KANAI
  • Publication number: 20230006321
    Abstract: A power storage module includes: a first power storage cell and a second power storage cell placed to be adjacent to each other, the first power storage cell and the second power storage cell each including a housing having a top face and external terminals provided on the top face; and a spacer having an insulating property and placed between the housings adjacent to each other. The spacer includes a discharge portion via which liquid reaching the spacer from above is discharged to outside the spacer.
    Type: Application
    Filed: May 18, 2022
    Publication date: January 5, 2023
    Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Hiroki NAGAI, Takaaki MATSUI, Takafumi NOSE, Koichiro ISOBE
  • Publication number: 20220278401
    Abstract: A power storage device includes a plurality of power storage cells. An end surface portion of a case has an aspect ratio of 1.4 or more. At least a part of a first region between a lower end of a sealing part projected image and an upper end of a principal surface region projected image receives a pressure of a first surface pressure. At least a part of a second region between the upper end of the principal surface region projected image and a lower end of the principal surface region projected image receives a pressure of a second surface pressure. The first surface pressure is higher than the second surface pressure and is 1.5 MPa or more and 3.5 MPa or less. A height of at least a part of the first region receiving the pressure of the first surface pressure is 1 mm or more.
    Type: Application
    Filed: February 18, 2022
    Publication date: September 1, 2022
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, Prime Planet Energy & Solutions, Inc.
    Inventors: Hiroki NAGAI, Takaaki MATSUI, Takafumi NOSE, Koichiro ISOBE, Ryoichi WAKIMOTO
  • Publication number: 20220271386
    Abstract: A battery module includes a pair of secondary batteries disposed adjacent to each other and a spacer disposed between the secondary batteries. Each of the secondary batteries includes a plurality of electrodes each of which has a rectangular shape and is disposed to face each other, a case configured to house the electrodes, the case having a rectangular parallelepiped shape, and an electrolyte in the case. The spacer is made of an elastic body. An aspect ratio of each of the electrodes is 10 or less, and a spring constant of the spacer is 0.03 MPa/mm or more and 5.4 MPa/mm or less.
    Type: Application
    Filed: January 11, 2022
    Publication date: August 25, 2022
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, PRIME PLANET ENERGY & SOLUTIONS, INC.
    Inventors: Hiroki NAGAI, Takaaki MATSUI, Takafumi NOSE, Koichiro ISOBE, Koji FUJINAGA, Kouhei TSUZUKI
  • Publication number: 20210157658
    Abstract: A processing unit generates, in the initial setting of all-to-all communication between processes, a unique node-order process number for each process on the basis of hardware information, computes the virtual rank number of each process on the basis of the node-order process number of the process, and stores the computed virtual rank numbers in a storage unit. When performing the al-to-all communication between the processes, the processing unit determines the communication partner process of each process for the current step in the all-to-all communication by performing an exclusive OR operation between the virtual rank number of the process, stored in, the storage unit, and the step number of the current step. Then, the processing unit performs communication from each process to the corresponding communication partner process.
    Type: Application
    Filed: October 7, 2020
    Publication date: May 27, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Akira NARIBAYASHI, Takafumi Nose
  • Patent number: 9817706
    Abstract: An information processing device in a parallel computer system, the information processing device includes a processor.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: November 14, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Takafumi Nose
  • Publication number: 20170153931
    Abstract: An information processing device in a parallel computer system, the information processing device includes a processor.
    Type: Application
    Filed: September 14, 2016
    Publication date: June 1, 2017
    Applicant: FUJITSU LIMITED
    Inventor: Takafumi Nose
  • Patent number: 9594651
    Abstract: A parallel computer system includes a parallel computer including nodes connected via communication routes and respectively executing calculations, and a control device to allocate a job to a predetermined number of nodes. The control device includes a job allocation processor to allocate, to a peripheral region of first N-dimensional job nodes allocated with a first job, any of an empty node, a zero-dimensional job node, and a node at a side or a surface with one node length of M-dimensional job nodes, N=<1 and M<N, and a failure processor to, when a failure occurs in the first N-dimensional job nodes, allocate at least one node among the nodes in the peripheral region to a relay node, select a route passing through the relay node as an alternative route for a route with the failure, and execute communication among the nodes via the alternative route.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: March 14, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Takafumi Nose
  • Publication number: 20160041890
    Abstract: A parallel computer system includes a parallel computer including nodes connected via communication routes and respectively executing calculations, and a control device to allocate a job to a predetermined number of nodes. The control device includes a job allocation processor to allocate, to a peripheral region of first N-dimensional job nodes allocated with a first job, any of an empty node, a zero-dimensional job node, and a node at a side or a surface with one node length of M-dimensional job nodes, N=<1 and M<N, and a failure processor to, when a failure occurs in the first N-dimensional job nodes, allocate at least one node among the nodes in the peripheral region to a relay node, select a route passing through the relay node as an alternative route for a route with the failure, and execute communication among the nodes via the alternative route.
    Type: Application
    Filed: July 13, 2015
    Publication date: February 11, 2016
    Inventor: Takafumi Nose
  • Publication number: 20140201475
    Abstract: An information processing system in which a plurality of information processing apparatuses are connected with each other, wherein each information processing apparatus includes a storage unit configured to store data according to each destination information processing apparatus, and a transmission control unit configured to transmit data to be transmitted in the same transmission direction and with the same number of hops collectively among the data stored in the storage unit.
    Type: Application
    Filed: November 22, 2013
    Publication date: July 17, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Takafumi NOSE, Kenichi MIURA