Abstract: A signal transmission device includes a differential driver, a first single-ended driver circuit block, a second single-ended driver circuit block, a control circuit, and a common-mode filter. In the case where two-channel single-ended transmission is performed by using the first and second single-ended driver circuit blocks, the control circuit controls a driving capability of the first single-ended driver circuit block and a driving capability of the second single-ended driver circuit block in accordance with a combination of a change in a logical value of an output signal of the first single-ended driver circuit block and a change in a logical value of an output signal of the second single-ended driver circuit block.

Abstract: A signal transmission device includes a differential driver, a first single-ended driver circuit block, a second single-ended driver circuit block, a control circuit, and a common-mode filter. In the case where two-channel single-ended transmission is performed by using the first and second single-ended driver circuit blocks, the control circuit controls a driving capability of the first single-ended driver circuit block and a driving capability of the second single-ended driver circuit block in accordance with a combination of a change in a logical value of an output signal of the first single-ended driver circuit block and a change in a logical value of an output signal of the second single-ended driver circuit block.

Abstract: A communication system in which an operating voltage can be selected from a plurality of interface voltages enables an interface voltage to be switched in a stable manner during operation of the system. When the interface voltage is to be switched, a host device (1) and a slave device (2) perform the switching while maintaining the signal level of buses in a stable manner. This structure enables the communication system to switch an interface voltage using a small number of signal lines.

Abstract: A communication system in which an operating voltage can be selected from a plurality of interface voltages enables an interface voltage to be switched in a stable manner during operation of the system. When the interface voltage is to be switched, a host device (1) and a slave device (2) perform the switching while maintaining the signal level of buses in a stable manner. This structure enables the communication system to switch an interface voltage using a small number of signal lines.

Abstract: A communication system in which an operating voltage can be selected from a plurality of interface voltages enables an interface voltage to be switched in a stable manner during operation of the system. When the interface voltage is to be switched, a host device (1) and a slave device (2) perform the switching while maintaining the signal level of buses in a stable manner. This structure enables the communication system to switch an interface voltage using a small number of signal lines.

Abstract: A communication system in which an operating voltage can be selected from a plurality of interface voltages enables an interface voltage to be switched in a stable manner during operation of the system. When the interface voltage is to be switched, a host device (1) and a slave device (2) perform the switching while maintaining the signal level of buses in a stable manner. This structure enables the communication system to switch an interface voltage using a small number of signal lines.

Abstract: It is an object of the invention to inhibit a drop in the data transmission efficiency due to the transmission of an interrupt signal.

Abstract: A communication system in which an operating voltage can be selected from a plurality of interface voltages enables an interface voltage to be switched in a stable manner during operation of the system. When the interface voltage is to be switched, a host device (1) and a slave device (2) perform the switching while maintaining the signal level of buses in a stable manner. This structure enables the communication system to switch an interface voltage using a small number of signal lines.

Abstract: An object of the present invention is to provide a technique to improve the data transmission efficiency which allows correct reception of the data at the same time.

Abstract: A communication system in which an operating voltage can be selected from a plurality of interface voltages enables an interface voltage to be switched in a stable manner during operation of the system. When the interface voltage is to be switched, a host device (1) and a slave device (2) perform the switching while maintaining the signal level of buses in a stable manner. This structure enables the communication system to switch an interface voltage using a small number of signal lines.

Abstract: It is an object of the invention to inhibit a drop in the data transmission efficiency due to the transmission of an interrupt signal.

Abstract: An object of the present invention is to provide a technique to improve the data transmission efficiency which allows correct reception of the data at the same time.

Abstract: An adapter for a memory device for connecting a detachable memory device to an AT attachment (ATA) interface of a host computer and a connecting method using the adapter are presented. With a conventional adapter which is not supplied with a number of heads and a number of sectors per track of the memory device in advance, the actual numbers of the memory area of the memory device may be different from those supplied the adapter for a memory device. This prevents the memory device from being normally accessed in a cylinder head sector (CHS) mode by the adapter. The adapter for a memory device according to the present invention identifies a file format of data stored in the memory area in the memory device, and retrieves and saves data about the number of heads and the number of sectors per track. Even if the adapter is not previously supplied with the number of heads and the number of sectors per track of the memory device, it accordingly allows the memory device to be accessed in the CHS mode.

Abstract: An apparatus for detecting an information recorded area on an information recording medium having the information recorded area and an information non-recorded area. The apparatus includes an optical head for radiating a light beam onto the information recording medium, a motor for rotating the information recording medium. In the apparatus, an electrical signal corresponding to a reflected light reflected by the information recording medium while the information recording medium is rotated is generated. The electrical signal corresponds to the information recorded in the information recorded area, and the electrical signal changes between a first potential level and a second potential level which is different from the first potential level. Further, in the apparatus, a threshold signal is generated by dropping the first potential level with a prescribed potential and raising the second potential level with the prescribed potential, and delaying the electrical signal.

Abstract: A head control apparatus of the invention includes a moving unit for moving an optical head to a given information track on an optical disk having concentric information tracks, a detector for detecting a direction of movement of the optical head from the a signal reproduced from the optical head, and a controller that, when the detector has detected the direction of movement of the optical head, controls the moving unit so that the optical head may move to a specified information track at a first speed, and that, when the detector has not detected the direction of movement the optical head, controls the moving unit so that the optical head may move to a specified information track at a second speed slower than the first speed.

Abstract: According to this invention, an optical signal processing apparatus for an optical disk has an actuator for moving an optical head in an radial direction of the optical disk, a plurality of first photodiodes for receiving a light beam reflected by the optical disk, an addition circuit for generating a first sum signal representing a sum of signals from the first photodiodes, a polarizing beam splitter for splitting the light beam reflected by the optical disk in accordance with directions of polarization, a plurality of second photodiodes for receiving light passing through the polarizing beam splitter, a subtraction circuit for generating a difference signal representing a difference between signals from the second photodiodes, and a circuit for determining a moving direction of the optical head, using the sum signal and the difference signal during a seek operation.

Abstract: In an optical disk apparatus which reads specifications data from a control track on various types of optical disks requiring different laser powers for data reading, in reading data from the control track, the power of the laser beam of a semiconductor laser oscillator is set low according to an optical disk requiring a low-power laser beam for data reading, and when accessing the control track indicates that the optical disk actually requiring a high-power laser beam, the power of the laser beam is changed to high power.

Abstract: A binary signal detector includes a delay circuit for delaying an analog signal reproduced from an optical disk by a predetermined period of time so as to output a delayed analog signal which is delayed from the change in level of the analog signal and varies in proportion to the level change, a reference signal generator for providing an analog reference signal which is changes in proportion to the level change of the analog signal and has a larger amplitude than the delayed analog signal, and a comparator for comparing the level of the analog reference signal with that of the delayed analog signal, and generating a binary output having a logic level corresponding to the binary data when the signal level of the analog reference signal is different from that of the delayed analog signal.

Abstract: An assembly kit for use as a toy or the like including plurality of rod elements, each having a pair of half portions and fasteners for fixing together the half portions, the half portions having ends in the axial direction and first and second recessed portions on the ends respectively. The first recessed portions are formed in a semi-arcuate configuration, and the second recessed portions are smaller in diameter than the first recessed portions and extend axially outward from the first recessed portions. A plurality of bolts are provided having head portions and shank portions connected to the head portions, the head portions being formed in a disk shape to respectively fit into the first recessed portions and the shank portions being respectively provided with external threads at a front end of the shank portion to fit in the second recessed portion. A plurality of connecting elements forming spheres in general are provided with a plurality of internal threads with which the bolts are engaged.