Abstract: A video encoding device capable of performing a near-real-time encoding process while restraining deterioration in image quality. A first encoding section encodes a video signal to generate a first stream and extracts stream information including space- and time- related information of the video signal. A stream buffer stores video scenes of the first stream which correspond to a partial time of the video signal. An encoding control section analyzes a code generation rate and motion information from the stream information to generate encoding control information. A second encoding section encodes the first stream read from the stream buffer, in accordance with the encoding control information, to generate a second stream. The stream buffer stores multiples video scenes of the first stream by means of which a scene change can be detected as an information rate change.

Abstract: In an image processing system, an image-input-processing unit divides an original image into portions so as to generate divided original images, and writes the divided original images in an encoder-side memory so that luminance data and chrominance data of each of the divided original images are stored in different storage areas. When predictive coding is performed, the encoding unit divides a reference image into portions so as to generate divided reference images which include information necessary for predictive coding of the divided original images, stores the divided reference images. The decoding unit divides and decodes an inputted encoded image so as to generate divided decoded-data sets, and writes the divided decoded-data sets in a decoder-side memory so that luminance data and chrominance data in each of the divided decoded-data sets are stored in different storage areas.

Abstract: An image encoding device for encoding the image data of one screen composed of a plurality of image slices that each correspond to pixels in horizontal arrays on the screen, comprising: a slice data selection unit for selecting the image data of a plurality of slices constituting the one screen in a specified slice order; and an encoded slice data output unit for outputting the data of the plurality of selected and encoded image slices to the outside in an order corresponding to the specified order but in a slice order different from the specified order.

Abstract: A video encoding device capable of performing a near-real-time encoding process while restraining deterioration in image quality. A first encoding section encodes a video signal to generate a first stream and extracts stream information including space- and time-related information of the video signal. A stream buffer stores video scenes of the first stream which correspond to a partial time of the video signal. An encoding control section analyzes a code generation rate and motion information from the stream information to generate encoding control information. A second encoding section encodes the first stream read from the stream buffer, in accordance with the encoding control information, to generate a second stream. The stream buffer stores multiples video scenes of the first stream by means of which a scene change can be detected as an information rate change.

Abstract: In an image processing system, an image-input-processing unit divides an original image into portions so as to generate divided original images, and writes the divided original images in an encoder-side memory so that luminance data and chrominance data of each of the divided original images are stored in different storage areas. When predictive coding is performed, the encoding unit divides a reference image into portions so as to generate divided reference images which include information necessary for predictive coding of the divided original images, stores the divided reference images.

Abstract: A motion estimation and compensation device that avoids discrepancies in chrominance components which could be introduced in the process of motion vector estimation. The device has a motion vector estimator for finding motion vectors in given interlace-scanning chrominance-subsampled video signals. The estimator compares each candidate block in a reference picture with a target block in an original picture by using a sum of absolute differences (SAD) in luminance as similarity metric, chooses a best matching candidate block that minimizes the SAD, and determines its displacement relative to the target block. In this process, the estimator gives the SAD of each candidate block an offset determined from the vertical component of a corresponding motion vector, so as to avoid chrominance discrepancies. A motion compensator then produces a predicted picture using such motion vectors and calculates prediction error by subtracting the predicted picture from the original picture.

Abstract: A data encoding/decoding apparatus comprises a decoder which decodes a coded stream, which is formed in a first format and inputted on real time, to generate video data and audio data. A video output memory stores the video data from the decoder. An audio output memory stores the audio data from the decoder. A video input memory is provided to be connected to the decoder through a first data path when the coded stream is transcoded to generate a second stream formed in a second format. An audio input memory is provided to be connected to the decoder through a second data path when the transcoding is performed. An encoder encodes the video data from the video input memory and the audio data from the audio input memory to generate the second stream.

Abstract: A digital PLL circuit employs a fixed-frequency output signal from a fixed-frequency oscillator, to provide a signal synchronized with an external reference signal. The digital PLL circuit has a counter and an adjuster. The counter counts clock periods (clock pulses) of the fixed-frequency output signal. The adjuster increments or decrements a value counted by the counter a predetermined number of times in a predetermined period according to a deviation of the fixed-frequency output signal from the reference signal. This digital PLL circuit is inexpensive because it employs no DA converter nor VCO.