Patents by Inventor Takahiro Fujioka

Takahiro Fujioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20010054997
    Abstract: A liquid crystal display device capable of improving display quality by enabling proper execution of receipt and acceptance of image signals through compensation for variation in duty ratios of clock signals as input to liquid crystal driver circuitry, is provided.
    Type: Application
    Filed: April 18, 2001
    Publication date: December 27, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Takahiro Fujioka, Shigeru Ito, Mitsuru Goto, Yozo Nakayasu, Yoshiyuki Saito
  • Publication number: 20010024183
    Abstract: A liquid crystal display device including a liquid crystal panel having a plurality of pixels, a driving circuit applying a video signal voltage to each of the pixels in accordance with display data. The driving circuit has a first circuit, a second circuit, and a switching circuit which connects an output terminal of the first circuit with an input terminal of the second circuit. The first circuit outputs a first voltage and a second voltage in accordance with first display data, and outputs the second voltage and a third voltage in accordance with second display data. The second voltage is lower than the first voltage, and the third voltage is lower than the second voltage.
    Type: Application
    Filed: May 11, 2001
    Publication date: September 27, 2001
    Inventors: Yukihide Ode, Akira Ogura, Kentaro Agata, Kazunari Kurokawa, Takahiro Fujioka, Hiroshi Katayanagi, Mitsuru Goto
  • Patent number: 6232941
    Abstract: A liquid crystal display device is capable of generating gradation voltages for multilevel gradation, such as 256-level gradation, without increasing the chip size of video signal line driving means.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: May 15, 2001
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Yukihide Ode, Akira Ogura, Kentaro Agata, Kazunari Kurokawa, Takahiro Fujioka, Hiroshi Katayanagi, Mitsuru Goto
  • Patent number: 6054975
    Abstract: A liquid crystal display device whose architrave area is reduced by reducing a distance between input and output terminals of each tape carrier package for supplying driving voltages to the liquid crystal display device is provided. The liquid crystal display device to which the present invention is applied comprises a liquid crystal display panel, a plurality of tape carrier packages provided around the liquid crystal display panel and a circuit board connected to each tape carrier package. Each tape carrier package comprises a semiconductor chip having a plurality of input terminals and a plurality of output terminals and a film having an opening at the middle thereof and provided, at the opening thereof, with a plurality of input side wires to be connected to the plurality of input terminals of the semiconductor chip and a plurality of output side wires to be connected to the plurality of output terminals of the semiconductor chip.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: April 25, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Kazunari Kurokawa, Takahiro Fujioka, Shinji Yasukawa, Akira Ogura, Hiroyuki Takahashi
  • Patent number: 5920115
    Abstract: To provide a semiconductor device in which a thin resin film is provided on the whole margin of the principal plane of a semiconductor chip a lead is provided on the thin resin film, the lead is electrically connected with input and output electrode pads of the semiconductor chip, and the electrical joint is covered and sealed with a seal resin.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: July 6, 1999
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Corp.
    Inventors: Makoto Kimura, Shinji Tojo, Takahiro Fujioka, Akihiko Narisawa, Yoshiyuki Tanigawa, Shinya Kanamitsu, Koji Akimoto, Hiroyuki Mouri
  • Patent number: 5767571
    Abstract: To provide a semiconductor device in which a thin resin film is provided on the whole margin of the principal plane of a semiconductor chip, a lead is provided on the thin resin film, the lead is electrically connected with input and output electrode pads of the semiconductor chip, and the electrical joint is covered and sealed with a seal resin.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: June 16, 1998
    Assignees: Hitachi, Ltd, Hitachi Device Engineering Corp
    Inventors: Makoto Kimura, Shinji Tojo, Takahiro Fujioka, Akihiko Narisawa, Yoshiyuki Tanigawa, Shinya Kanamitsu, Koji Akimoto, Hiroyuki Mouri
  • Patent number: 5614042
    Abstract: The present invention discloses a tape binding device winding a tape piece having an adhesive surface on one side around an electric wire bundle to bundle it. In the device, a pair of arms having a holding surface are lowered while holding the tape piece cut into a predetermined length on the holding surface. As it is lowered, free ends of both arms are lowered to both sides separated by a top portion of the electric wire bundle. At the time of lowering, after winding the tape piece by pressing it around a surface of the electric wire bundle, the free ends of both arms make adhesive surfaces of both ends of the tape piece under the electric wire bundle to adhere each other and are clipped between them, thereby laminating adhesive surfaces each other.
    Type: Grant
    Filed: December 2, 1994
    Date of Patent: March 25, 1997
    Assignees: Sumitomo Electric Indus., Sumitomo Wiring Systems, Ltd.
    Inventors: Yutaka Nishide, Takahiro Fujioka, Ricardo K. Yoshida