Patents by Inventor Takahiro Hiramatsu

Takahiro Hiramatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130242207
    Abstract: A communication apparatus is used to share information via a communication network. The communication apparatus includes: a housing; a moving unit provided to be movable relatively with respect to the housing; a light projecting unit that projects light modulated based on image information, is provided in one of the housing or the moving unit, and includes a projector lens; and an image input unit that is to input an image, is provided in the other of the housing or the moving unit, and includes an image capturing lens. The moving unit is capable of moving relatively with respect to the housing between a covering position at which the projector lens and the image capturing lens are covered and an exposing position at which the projector lens and the image capturing lens are exposed.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 19, 2013
    Inventors: Takahiro HIRAMATSU, Kiyoto IGARASHI
  • Patent number: 7993964
    Abstract: A manufacturing method of a semiconductor device includes forming an oxide semiconductor thin film layer of zinc oxide, wherein at least a portion of the oxide semiconductor thin film layer in an as-deposited state includes lattice planes having a preferred orientation along a direction perpendicular to the substrate and a lattice spacing d002 of at least 2.619 ?.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: August 9, 2011
    Assignees: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Takashi Hirao, Takahiro Hiramatsu, Mamoru Furuta, Hiroshi Furuta, Tokiyoshi Matsuda
  • Patent number: 7981734
    Abstract: A manufacturing method of a thin film transistor includes forming a pair of source/drain electrodes on a substrate, such that the source/drain electrodes define a gap therebetween; forming low resistance conductive thin films, which define a gap therebetween, on the source/drain electrodes; and forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap defined between the low resistance conductive thin films so that the oxide semiconductor thin film layer functions as a channel. The low resistance conductive thin films and the oxide semiconductor thin film layer are etched so that side surfaces of the resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel. A gate electrode is mounted over the oxide semiconductor thin film layer.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: July 19, 2011
    Assignees: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Mamoru Furuta, Takashi Hirao, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu, Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida
  • Patent number: 7977169
    Abstract: A semiconductor device includes an oxide semiconductor thin film layer primarily including zinc oxide having at least one orientation other than (002) orientation. The zinc oxide may have a mixed orientation including (002) orientation and (101) orientation. Alternatively, the zinc oxide may have a mixed orientation including (100) orientation and (101) orientation.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: July 12, 2011
    Assignees: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Takashi Hirao, Mamoru Furuta, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu
  • Patent number: 7693278
    Abstract: An RTP packet generating unit 11 packetizes data into packets, and adds identification information to the header of each of the packets, the identification information identifying each of the packets. An RTP packet encrypting unit 13 divides data included in each of the generated packets into blocks, and encrypts the data included in each of the packets on a block-by-block basis using an encryption key which an encryption key sharing unit 12 shares with a receiving client in such a manner that, when encrypting a first block of the data, the packet encrypting unit encrypts it using the identification information for identifying each of the packets, which is contained, as an initial vector, in the header of each of the packets, and, when encrypting each subsequent block of the data, encrypts it according to an encryption method which uses an immediately-previously-encrypted block.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: April 6, 2010
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takahiro Hiramatsu, Hironobu Abe, Koichi Yamada, Junichi Yokosato
  • Publication number: 20090286351
    Abstract: A manufacturing method of a semiconductor device includes forming an oxide semiconductor thin film layer of zinc oxide, wherein at least a portion of the oxide semiconductor thin film layer in an as-deposited state includes lattice planes having a preferred orientation along a direction perpendicular to the substrate and a lattice spacing d002 of at least 2.619 ?.
    Type: Application
    Filed: July 27, 2009
    Publication date: November 19, 2009
    Applicants: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Takashi HIRAO, Takahiro HIRAMATSU, Mamoru FURUTA, Hiroshi FURUTA, Tokiyoshi MATSUDA
  • Publication number: 20090269881
    Abstract: A manufacturing method of a thin film transistor includes forming a pair of source/drain electrodes on a substrate, such that the source/drain electrodes define a gap therebetween; forming low resistance conductive thin films, which define a gap therebetween, on the source/drain electrodes; and forming an oxide semiconductor thin film layer on upper surface of the low resistance conductive thin films and in the gap defined between the low resistance conductive thin films so that the oxide semiconductor thin film layer functions as a channel. The low resistance conductive thin films and the oxide semiconductor thin film layer are etched so that side surfaces of the resistance conductive thin films and corresponding side surfaces of the oxide semiconductor thin film layer coincide with each other in a channel width direction of the channel. A gate electrode is mounted over the oxide semiconductor thin film layer.
    Type: Application
    Filed: July 8, 2009
    Publication date: October 29, 2009
    Applicants: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Mamoru FURUTA, Takashi Hirao, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu, Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida
  • Patent number: 7598520
    Abstract: A semiconductor device includes an oxide semiconductor thin film layer of zinc oxide. The (002) lattice planes of at least a part of the oxide semiconductor thin film layer have a preferred orientation along a direction perpendicular to a substrate of the semiconductor device and a lattice spacing d002 of at least 2.619 ?.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: October 6, 2009
    Assignees: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Takashi Hirao, Takahiro Hiramatsu, Mamoru Furuta, Hiroshi Furuta, Tokiyoshi Matsuda
  • Patent number: 7576394
    Abstract: A thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: August 18, 2009
    Assignees: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Mamoru Furuta, Takashi Hirao, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu, Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida
  • Publication number: 20070278490
    Abstract: A semiconductor device includes an oxide semiconductor thin film layer of zinc oxide. The (002) lattice planes of at least a part of the oxide semiconductor thin film layer have a preferred orientation along a direction perpendicular to a substrate of the semiconductor device and a lattice spacing d002 of at least 2.619 ?.
    Type: Application
    Filed: June 1, 2007
    Publication date: December 6, 2007
    Applicants: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Takashi Hirao, Takahiro Hiramatsu, Mamoru Furuta, Hiroshi Furuta, Tokiyoshi Matsuda
  • Publication number: 20070187678
    Abstract: A semiconductor device includes an oxide semiconductor thin film layer primarily including zinc oxide having at least one orientation other than (002) orientation. The zinc oxide may have a mixed orientation including (002) orientation and (101) orientation. Alternatively, the zinc oxide may have a mixed orientation including (100) orientation and (101) orientation.
    Type: Application
    Filed: February 9, 2007
    Publication date: August 16, 2007
    Applicants: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Takashi Hirao, Mamoru Furuta, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu
  • Publication number: 20070187760
    Abstract: A thin film transistor includes a substrate, and a pair of source/drain electrodes (i.e., a source electrode and a drain electrode) formed on the substrate and defining a gap therebetween. A pair of low resistance conductive thin films are provided such that each coats at least a part of one of the source/drain electrodes. The low resistance conductive thin films define a gap therebetween. An oxide semiconductor thin film layer is continuously formed on upper surfaces of the pair of low resistance conductive thin films and extends along the gap defined between the low resistance conductive thin films so as to function as a channel. Side surfaces of the oxide semiconductor thin film layer and corresponding side surfaces of the low resistance conductive thin films coincide with each other in a channel width direction of the channel.
    Type: Application
    Filed: February 1, 2007
    Publication date: August 16, 2007
    Applicants: Kochi Industrial Promotion Center, Casio Computer Co., Ltd.
    Inventors: Mamoru Furuta, Takashi Hirao, Hiroshi Furuta, Tokiyoshi Matsuda, Takahiro Hiramatsu, Hiromitsu Ishii, Hitoshi Hokari, Motohiko Yoshida
  • Publication number: 20070033391
    Abstract: An RTP packet generating unit 11 packetizes data into packets, and adds identification information to the header of each of the packets, the identification information identifying each of the packets. An RTP packet encrypting unit 13 divides data included in each of the generated packets into blocks, and encrypts the data included in each of the packets on a block-by-block basis using an encryption key which an encryption key sharing unit 12 shares with a receiving client in such a manner that, when encrypting a first block of the data, the packet encrypting unit encrypts it using the identification information for identifying each of the packets, which is contained, as an initial vector, in the header of each of the packets, and, when encrypting each subsequent block of the data, encrypts it according to an encryption method which uses an immediately-previously-encrypted block.
    Type: Application
    Filed: December 9, 2005
    Publication date: February 8, 2007
    Inventors: Takahiro Hiramatsu, Hironobu Abe, Koichi Yamada, Junichi Yokosato
  • Publication number: 20020104089
    Abstract: In cases where a selection item I1 is selected from a plurality of selection items on a browser screen, the selection items are arranged according to position information of the selection items described in a BML document and are displayed on the browser screen by a function of a selection item displaying unit, the judgment whether or not a cursor is placed on a display area of one selection item on the browser screen is performed in a selection item determining unit, it is detected that the cursor is placed on the display area of a selection item I1, and the selection item I1 is set to a selected state. Also, in cases where a change of the selection item I1 set to the selected state to a selection item I2 is performed, the cursor is placed on the display area of the selection item I2, and the transfer of the selected state from the selection item I1 to the selection item I2 is performed according to a state transition diagram defined by the BML document.
    Type: Application
    Filed: October 5, 2001
    Publication date: August 1, 2002
    Inventors: Takahiro Hiramatsu, Koichi Nakashima, Koichi Hiramatsu
  • Publication number: 20020101787
    Abstract: A time difference between a broadcast time included in a digital broadcast signal and a device time peculiar to an information processing device is calculated, and an estimated broadcast time is calculated according to the time difference and the device time. Therefore, the estimated broadcast time is calculated without adjusting the device time to the broadcast time. Accordingly, when the device requests a broadcast time, an operation base on the estimated broadcast time can be performed without exerting an influence of the broadcast time on constitutional elements or having a redundant configuration of a clock system.
    Type: Application
    Filed: October 5, 2001
    Publication date: August 1, 2002
    Inventors: Ryousuke Fujii, Toyoshi Makino, Masahiro Fukuda, Takahiro Hiramatsu
  • Patent number: 6065856
    Abstract: An air hole 20 substantially longitudinally passing through a reflector 12 is formed so that it is opened in the substantially uppermost end portion of the reflective surface 12a of the reflector 12. As an upper wall surface 12b is formed on the upper side of the reflective surface 12a, the air hole 20 is prevented from being seen through a lens 14. Moreover, an extended air-hole forming portion 22 for use in forming a substantially L-shaped air hole which is bent downward from the rear end portion of the air hole 20 is integrally formed with the reflector 12, whereby a rubber tube that has heretofore been employed can be dispensed with to ensure that the lamp cost is made reducible.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: May 23, 2000
    Assignee: Koito Manufacturing Co., Ltd.
    Inventors: Takahiro Hiramatsu, Masahito Naganawa