Abstract: A memory system includes a first nonvolatile memory, a first processor, and a second processor. The first processor sets a first assignment amount. The second processor performs access to the first nonvolatile memory, calculates a consumed amount which is an amount according to an operation time of the first nonvolatile memory in the access, and transmits a notification to the first processor when the consumed amount reaches the first assignment amount.

Abstract: A memory system includes a memory and a memory controller. The memory includes first and second parallel operation elements, each including a plurality of first and second storage regions, respectively, and first and second buffers, respectively. The memory controller performs operations on the memory based on first and second group information. The first group information defines first groups, each first group including one first storage region and one second storage region, and each second group including at least two first groups. The memory controller, in response to a host command targeting a first storage region, (i) acquires first data from the first buffer, and thereafter (ii) causes the memory to read out second data to the first buffer. The first storage region storing the first data and the second storage region storing the second data belong to different first groups and to the same second group.

Abstract: A memory system includes a first nonvolatile memory, a first processor, and a second processor. The first processor sets a first assignment amount. The second processor performs access to the first nonvolatile memory, calculates a consumed amount which is an amount according to an operation time of the first nonvolatile memory in the access, and transmits a notification to the first processor when the consumed amount reaches the first assignment amount.

Abstract: A memory system includes a first nonvolatile memory, a first processor, and a second processor. The first processor sets a first assignment amount. The second processor performs access to the first nonvolatile memory, calculates a consumed amount which is an amount according to an operation time of the first nonvolatile memory in the access, and transmits a notification to the first processor when the consumed amount reaches the first assignment amount.

Abstract: A memory system includes a memory and a memory controller. The memory includes first and second parallel operation elements, each including a plurality of first and second storage regions, respectively, and first and second buffers, respectively. The memory controller performs operations on the memory based on first and second group information. The first group information defines first groups, each first group including one first storage region and one second storage region, and each second group including at least two first groups. The memory controller, in response to a host command targeting a first storage region, (i) acquires first data from the first buffer, and thereafter (ii) causes the memory to read out second data to the first buffer. The first storage region storing the first data and the second storage region storing the second data belong to different first groups and to the same second group.

Abstract: According to one embodiment, a memory system includes a first memory including a message queue having first to nth addresses (n?2, n is natural number), a first pointer showing one of the first to nth addresses, and a second pointer showing one of the first to nth addresses, a monitor unit which detects whether the first and second pointers show the first address, and a processing unit which changes an address shown by the first pointer from the first address to an ith address (n?i?2, i is natural number) when the first and second pointers show the first address. An address shown by the second pointer is incremented from the first address to a (j+1)th address (j?1, j is natural number) when first to jth messages are queued in the first to jth addresses.

Abstract: A memory system includes a memory and a memory controller. The memory includes first and second parallel operation elements, each including a plurality of first and second storage regions, respectively, and first and second buffers, respectively. The memory controller performs operations on the memory based on first and second group information. The first group information defines first groups, each first group including one first storage region and one second storage region, and each second group including at least two first groups. The memory controller, in response to a host command targeting a first storage region, (i) acquires first data from the first buffer, and thereafter (ii) causes the memory to read out second data to the first buffer. The first storage region storing the first data and the second storage region storing the second data belong to different first groups and to the same second group.

Abstract: A memory system includes a first nonvolatile memory, a first processor, and a second processor. The first processor sets a first assignment amount. The second processor performs access to the first nonvolatile memory, calculates a consumed amount which is an amount according to an operation time of the first nonvolatile memory in the access, and transmits a notification to the first processor when the consumed amount reaches the first assignment amount.

Abstract: According to one embodiment, a memory system includes a first memory including a message queue having first to nth addresses (n?2, n is natural number), a first pointer showing one of the first to nth addresses, and a second pointer showing one of the first to nth addresses, a monitor unit which detects whether the first and second pointers show the first address, and a processing unit which changes an address shown by the first pointer from the first address to an ith address (n?i?2, i is natural number) when the first and second pointers show the first address. An address shown by the second pointer is incremented from the first address to a (j+1)th address (j?1, j is natural number) when first to jth messages are queued in the first to jth addresses.

Abstract: According to one embodiment, a memory controller includes a first controller issuing one command which includes read commands for reading data from a nonvolatile memory, a second controller sequentially issuing the read commands and a dummy command which continues the read commands when the one command is received, and a third controller sequentially executing the read commands and the dummy command and informing an information of a read error to the second controller when the read error occurred, the second controller informing a completion of the one command to the first controller when the command which corresponds to the read error is the dummy command.

Abstract: According to one embodiment, a memory controller includes a first controller issuing one command which includes read commands for reading data from a nonvolatile memory, a second controller sequentially issuing the read commands and a dummy command which continues the read commands when the one command is received, and a third controller sequentially executing the read commands and the dummy command and informing an information of a read error to the second controller when the read error occurred, the second controller informing a completion of the one command to the first controller when the command which corresponds to the read error is the dummy command.

Abstract: An access control apparatus includes an accessor. An accessor accesses a recording medium in which a plurality of partitions are formed. A elector selects any one of a first mode and a second mode. A designator designates at least a part of the plurality of partitions in a manner different depending on a mode selected by the selector. A controller controls a processing operation of the accessor with reference to identification information of the partition designated by the designator, when the mode selected by the selector is the first mode. A sender sends the identification information of the partition designated by the designator in order for an external device to refer, when the mode selected by the selector is the second mode.

Abstract: A program processing apparatus includes an internal memory An internal memory is arranged to save a first program for activating a target program. A first designator designates the first program in response to a first manipulation in a state that an external memory which saves a second program for updating the internal memory is removed and the first program is saved in the internal memory. A second designator designates the second program in response to a second manipulation in a state that the external memory is attached. An executer executes the program designated by one of the first designator and the second designator.

Abstract: An access control apparatus includes a plurality of accesses. A plurality of accessors are respectively allocated to a plurality of operation modes in order to access a recording medium having a plurality of partitions and identification information which identifies a location of the plurality of partitions. An acceptor accepts a selection operation which selects any one of the plurality of operation modes. A first designator designates, based on the identification information provided in the recording medium, a part of partitions corresponding to the operation mode selected by the selection operation out of the plurality of partitions. A permitter permits an accessor corresponding to the operation mode selected by the selection operation out of the plurality of accessors to access the partition designated by the first designator.

Abstract: A content processing apparatus includes a taker. A taker takes a plurality of partial contents in an internal memory. A first transferor transfers the plurality of partial contents taken by the taker to an external memory by each partial amount. A creator repeatedly creates link information representing a link state of transfer-destination addresses by the first transferor in the internal memory, in parallel with a transfer process of the first transferor. An updater updates the link information created by the creator so that the plurality of partial contents transferred by the first transferor are combined with each other. A second transferor transfers the link information updated by the updater to the external memory.

Abstract: A data access apparatus includes a detector detects a unit region in a vacant state, out of a plurality of unit regions forming a data recording region, by referring to a plurality of parameter values respectively corresponding to the plurality of unit regions. A determiner determines whether or not a data value of the unit region detected by the detector indicates a predetermined value when the data recording region is a region in which there is a restriction on the number of recording instances. A permitter permits an access process to the data recording region corresponding to an affirmative determined result of the determiner. A first changer changes the parameter value corresponding to the unit region detected by the detector, out of the plurality of parameter values, corresponding to a negative determined result of the determiner. A restarter restarts the detector after the change process of the first changer.

Abstract: An image forming apparatus according to the present invention performs a process of printing on the printing paper in such a manner that, if a plurality of images are to be printed on one sheet of printing paper and there is improper image data among the image data of the plurality of images, a region in which an image corresponding to the improper image data is to be printed is left blank, and if the image data of all of the plurality of images is improper, the image forming apparatus does not perform the process of printing on the printing paper. Another image forming apparatus according to the present invention reads out image data of a plurality of images from a recording medium, prepares printing image data for an image in which the plurality of images, having been reduced, are arranged in predetermined regions, and prints that image on one sheet of printing paper.

Abstract: For use in copying data between a plurality of recording media, the present invention provides a data processing device adds up the amounts of data on a plurality of files recorded on a transmitting medium to thereby detect the total amount of copy data, displays an intermediate result of addition on a display unit while updating the result displayed during a process from the start of addition of the amounts of file data until the completion of addition and displays the final result of addition on the display unit upon the completion of addition. The user is unlikely to feel uneasy even when the detection of the total amount of copy data takes time.

Abstract: An image forming apparatus according to the present invention performs a process of printing on the printing paper in such a manner that, if a plurality of images are to be printed on one sheet of printing paper and there is improper image data among the image data of the plurality of images, a region in which an image corresponding to the improper image data is to be printed is left blank, and if the image data of all of the plurality of images is improper, the image forming apparatus does not perform the process of printing on the printing paper. Another image forming apparatus according to the present invention reads out image data of a plurality of images from a recording medium, prepares printing image data for an image in which the plurality of images, having been reduced, are arranged in predetermined regions, and prints that image on one sheet of printing paper.

Abstract: For use in copying data between a plurality of recording media, the present invention provides a data processing device adds up the amounts of data on a plurality of files recorded on a transmitting medium to thereby detect the total amount of copy data, displays an intermediate result of addition on a display unit while updating the result displayed during a process from the start of addition of the amounts of file data until the completion of addition and displays the final result of addition on the display unit upon the completion of addition. The user is unlikely to feel uneasy even when the detection of the total amount of copy data takes time.