Patents by Inventor Takahiro Nanba

Takahiro Nanba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220056571
    Abstract: A film forming method is provided in which, when a dielectric film is formed by sputtering a target, the number of particles to get adhered to the surface of a to-be-processed substrate immediately after film formation can be decreased to the extent possible without impairing the function of effectively suppressing the induction of abnormal discharging. A film forming method, according to this invention, of forming a dielectric film on a surface of a to-be-processed substrate by sputtering a target inside a vacuum chamber includes: at the time of sputtering the target, applying negative potential to the target in the form of pulses; and a frequency of applying the negative potential in the form of pulses is set to a range of 100 kHz or more and 150 kHz or below and an application time (Ton) of the negative potential is set to a range of 5 ?sec or longer and 8 ?sec or shorter.
    Type: Application
    Filed: July 9, 2020
    Publication date: February 24, 2022
    Applicant: ULVAC, INC.
    Inventors: Kengo Tsutsumi, Shinji Kohari, Kouji Sogabe, Toshimitsu Uehigashi, Takahiro Nanba
  • Publication number: 20200243310
    Abstract: A plasma processing apparatus of the invention includes: a chamber that has an internal space able to be depressurized and is configured such that a processing object is subjected to plasma treatment in the internal space; a first electrode that is disposed in the chamber and on which the processing object is to be mounted; a first power supply that applies a bias voltage of negative potential to the first electrode; a spiral shaped second electrode that is disposed outside the chamber and is disposed so as to face the first electrode with an upper lid of the chamber interposed therebetween; a second electrode that applies a high-frequency voltage to the second electrode. A plate having a shape forming a space and a cover provided to cover the plate are stacked in order and disposed between the first electrode and the processing object.
    Type: Application
    Filed: October 12, 2018
    Publication date: July 30, 2020
    Inventors: Tsuyoshi KAGAMI, Takahiro NANBA, Hiroki YAMAMOTO, Shinji KOHARI, Naoki MORIMOTO
  • Publication number: 20180057928
    Abstract: There is provided a sputtering apparatus which is capable of forming, with good uniformity of film thickness distribution, an insulator film having further improved crystallinity. Inside a vacuum chamber in which is provided an insulator target, there is disposed a stage for holding a substrate W to be processed so as to face the insulator target. The sputtering apparatus has: a driving means for driving to rotate the stage; a sputtering power source E1 for applying HF power to the insulator target; and a gas introduction means for introducing a rage gas into the vacuum chamber. The sputtering apparatus is characterized in that a distance d3 between the substrate and the insulator target is set to a range between 40 mm-150 mm.
    Type: Application
    Filed: July 15, 2015
    Publication date: March 1, 2018
    Applicant: ULVAC, INC.
    Inventors: Hiroki Yamamoto, Takahiro Nanba, Masanobu Kamii, Shinji Kohari, Tomoyasu Kondo, Naoki Morimoto
  • Publication number: 20170178875
    Abstract: There is provided an insulator target which, when mounted on a sputtering apparatus and supplied with AC power, is capable of preventing the discharging from occurring in a clearance between a shield and the target. The insulator target for the sputtering apparatus according to this invention, around which is disposed a shield at the time of assembling the insulator target on the sputtering apparatus, is made up of: a plate-shaped target material to be enclosed by the shield; and, suppose that one surface of the target material is defined as a sputtering surface to be subjected to sputtering, an annular supporting material coupled to an outer peripheral portion of the opposite surface of the target material. The supporting material has an extended portion which is extended outward from a peripheral surface of the target material and which keeps a predetermined clearance to the shield.
    Type: Application
    Filed: June 2, 2015
    Publication date: June 22, 2017
    Applicant: ULVAC, INC.
    Inventors: Shinji Kohari, Hiroki Yamamoto, Yoji Taguchi, Takahiro Nanba
  • Publication number: 20110256810
    Abstract: There is provided a method of manufacturing a chuck plate for an electrostatic chuck of good productivity which is free from poor releasing of a wafer which is a to-be-processed substrate, from the initial time of putting the electrostatic chuck to a new use. The method of manufacturing a chuck plate for electrostatic chuck ES which is made up of a dielectric body to cover a surface of the chuck main body having electrodes, includes the steps of: obtaining a sintered body by compression-forming raw material powder (or raw meal) into a predetermined shape and then sintering the same; forming, by polishing, such a surface of the sintered body as will come into contact with a substrate to be attracted, into a predetermined surface roughness and flatness; and performing blast processing for selectively removing only ready-to-be-separated particles that come into existence on the surface as a result of the polishing.
    Type: Application
    Filed: December 9, 2009
    Publication date: October 20, 2011
    Inventors: Takahiro Nanba, Naoki Morimoto, Kouji Sogabe, Masahiko Ishida
  • Patent number: 6173024
    Abstract: The bit stream reproducing apparatus is comprised of a frame length counter for measuring a data length of one frame; a first calculator for calculating a data length “L1” defined from a header to a scale factor; a second calculator for calculating a data length “L2” of an audio sample; and a third calculator for executing a calculation of E=F−(L1+L2×12) based upon calculation results of the first calculator and of the second calculator, and for sending out a control signal to a muting circuit so as to instruct a muting operation in the case of E<0.
    Type: Grant
    Filed: May 1, 1998
    Date of Patent: January 9, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takahiro Nanba, Masashi Kuroda, Makoto Kumano