Abstract: A motor includes a rotor configured to rotate with a shaft. The rotor includes a plurality of yoke portions and a plurality of holding portions each corresponding to a space portion provided between the adjacent yoke portions and configured to hold therein a magnet. At least one of the plurality of yoke portions includes a tab portion extending towards the holding portion and configured to hold the magnet held in the holding portion. The holding portion includes an insertion space provided between a first end portion of the yoke portion in an axial direction of the shaft and the tab portion. The insertion space allows the magnet to be inserted into the insertion space towards an inner side in a radial direction of the shaft.

Abstract: There is provided a time measuring device including: a first counter unit (204) that acquires a difference time between a first measured signal and a second measured signal as a first measurement result by counting on the basis of a reference clock signal; a delay signal generation unit (208) that generates a delay signal by delaying the first measured signal on the basis of the first measurement result fed back from the first counter unit; a measurement unit (210) that measures a difference time between the delay signal and the second measured signal as a second measurement result; and an operation unit (212) that performs an operation by using the first measurement result and the second measurement result.

Abstract: A motor includes a rotor configured to rotate with a shaft. The rotor includes a plurality of yoke portions and a plurality of holding portions each corresponding to a space portion provided between the adjacent yoke portions and configured to hold therein a magnet. At least one of the plurality of yoke portions includes a tab portion extending towards the holding portion and configured to hold the magnet held in the holding portion. The holding portion includes an insertion space provided between a first end portion of the yoke portion in an axial direction of the shaft and the tab portion. The insertion space allows the magnet to be inserted into the insertion space towards an inner side in a radial direction of the shaft.

Abstract: The present technology relates to a light-receiving device that makes it possible to simplify readout from a plurality of pixels and a process after the readout, without deteriorating light receiving sensitivity and characteristics in resolution. A plurality of unit elements is disposed above a substrate, each of the unit elements including a plurality of pixels disposed in m number of rows and n number of columns, and a readout section that sequentially reads out signals from a plurality of pixels disposed in a column direction among the plurality of pixels. The number of readout sections is at least the same as the number of columns. The readout section includes a QV amplifier. The present technology is applicable to the light-receiving device that detects radiation.

Abstract: A rotating electric machine includes a plurality of windings, and the plurality windings include a first winding in which a jumper wire portion is disposed on one side in a rotational axis direction of an armature core and a second winding in which a jumper wire portion is disposed on the other side in the rotational axis direction of the armature core.

Abstract: A light-receiving device of an embodiment of the present disclosure includes, on a first principal surface of a semiconductor layer, a pixel region that includes a plurality of light-receiving pixels each receiving light incident from side of a second principal surface of the semiconductor layer. The light-receiving device further includes, throughout a gap between the second principal surface and the pixel region, a low-impurity region having a relatively lower impurity concentration than the pixel region. The light-receiving pixels each include one or a plurality of photoelectric current extraction regions each including, on the first principal surface, an anode region and a cathode region, and a circuit region that is electrically coupled to each of the cathode regions and is electrically separated from the impurity region.

Abstract: An imaging apparatus 10 includes an imaging panel 11 formed by arranging imaging element units 20 included in one pixel or a plurality of pixels, in a two-dimensional matrix form. Each of the imaging element units 20 includes an imaging element 30 which converts an incident electromagnetic wave to a current, and a current/voltage conversion circuit 40A which converts the current from the imaging element to a voltage.

Abstract: Efficient generation of test scenarios without excess or lack thereof can be supported. A test scenario generation support device includes a storage device which holds use case scenarios relating to an application of a test target and a computation device which identifies from the use case scenarios a vocabulary on a screen display using a predetermined rule, identifies a screen object corresponding to the identified vocabulary for each of the use case scenarios using a predetermined algorithm, and generates a test scenario based on a test pattern defined in advance for each screen object.

Abstract: Efficient generation of test scenarios without excess or lack thereof can be supported. A test scenario generation support device includes a storage device which holds use case scenarios relating to an application of a test target and a computation device which identifies from the use case scenarios a vocabulary on a screen display using a predetermined rule, identifies a screen object corresponding to the identified vocabulary for each of the use case scenarios using a predetermined algorithm, and generates a test scenario based on a test pattern defined in advance for each screen object.

Abstract: An imaging apparatus includes an image sensor configured to convert an incident electromagnetic wave into current; a current/voltage conversion circuit that is configured to convert the current input from the image sensor into voltage and includes an operational amplifier configured to output voltage corresponding to the current input from the image sensor; and a sampling circuit that is configured to sample output of the operation amplifier and is provided between input/output terminals of the operational amplifier.

Abstract: An imaging apparatus 10 includes an imaging panel 11 formed by arranging imaging element units 20 included in one pixel or a plurality of pixels, in a two-dimensional matrix form. Each of the imaging element units 20 includes an imaging element 30 which converts an incident electromagnetic wave to a current, and a current/voltage conversion circuit 40A which converts the current from the imaging element to a voltage.

Abstract: An imaging apparatus includes an image sensor configured to convert an incident electromagnetic wave into current; a current/voltage conversion circuit that is configured to convert the current input from the image sensor into voltage and includes an operational amplifier configured to output voltage corresponding to the current input from the image sensor; and a sampling circuit that is configured to sample output of the operation amplifier and is provided between input/output terminals of the operational amplifier.

Abstract: An objective is to provide a pressure-contact type rectifier in which solder that increases the environmental load is not used, and neither burning nor breakage of a rectifying device occurs, even if temperature of the rectifying device increases due to current flowing or force towards outside the rectifying device is applied to a lead end, etc. By providing an electrically conductive friction reducer on at least one electrode face of the rectifying device, the temperature increase can be prevented, and the friction at the contact face can be reduced. Moreover, by providing a flexible portion on the lead end outside a cap, and fixing the flexible portion to the cap, the contact area between the lead and the rectifying device can be kept constant. As a result, a pressure-contact type rectifier in which neither burning nor breakage of the rectifying device occurs can be obtained.

Abstract: An objective is to provide a pressure-contact type rectifier in which solder that increases the environmental load is not used, and neither burning nor breakage of a rectifying device occurs, even if temperature of the rectifying device increases due to current flowing or force towards outside the rectifying device is applied to a lead end, etc. By providing an electrically conductive friction reducer on at least one electrode face of the rectifying device, the temperature increase can be prevented, and the friction at the contact face can be reduced. Moreover, by providing a flexible portion on the lead end outside a cap, and fixing the flexible portion to the cap, the contact area between the lead and the rectifying device can be kept constant. As a result, a pressure-contact type rectifier in which neither burning nor breakage of the rectifying device occurs can be obtained.

Abstract: By using a small number of needles and contact terminals at burn-in, electric contact check is performed between each needle and each terminal provided in each semiconductor chip, and thereby the yield of assembled products can be improved. A packaging structure in which, for example, a volatile memory chip and a nonvolatile memory chip are formed is assembled in accordance with a production scheme in which burn-in of each memory chip is performed while still under the state of a semiconductor wafer, and by forming the packaged structure using the good volatile memory chip subjected to burn-in and likewise, also, the nonvolatile memory chip. At this burn-in, contact check is performed by bringing a needle, provided in a burn-in board, into contact with, for example, six test-only signal terminals of a test circuit formed on each semiconductor chip.

Abstract: By using a small number of needles and contact terminals at burn-in, electric contact check is performed between each needle and each terminal provided in each semiconductor chip, and thereby the yield of assembled products can be improved. A packaging structure in which, for example, a volatile memory chip and a nonvolatile memory chip are formed is assembled in accordance with a production scheme in which burn-in of each memory chip is performed while still under the state of a semiconductor wafer, and by forming the packaged structure using the good volatile memory chip subjected to burn-in and likewise, also, the nonvolatile memory chip. At this burn-in, contact check is performed by bringing a needle, provided in a burn-in board, into contact with, for example, six test-only signal terminals of a test circuit formed on each semiconductor chip.

Abstract: By using a small number of needles and contact terminals at burn-in, electric contact check is performed between each needle and each terminal provided in each semiconductor chip, and thereby the yield of assembled products can be improved. A packaging structure in which, for example, a volatile memory chip and a nonvolatile memory chip are formed is assembled in accordance with a production scheme in which burn-in of each memory chip is performed while still under the state of a semiconductor wafer, and by forming the packaged structure using the good volatile memory chip subjected to burn-in and likewise, also, the nonvolatile memory chip. At this burn-in, contact check is performed by bringing a needle, provided in a burn-in board, into contact with, for example, six test-only signal terminals of a test circuit formed on each semiconductor chip.

Abstract: A Synchronous Dynamic Random Access Memory (SDRAM) has its operation mode selected to be the Single Data Rate (SDR) mode in response to the first state of the external terminal (OPT), thereby releasing data, which has been read out of a memory mat, in response to a clock signal produced by a clock regenerating circuit having a function of comparing the phases of the input and output of the circuit, or selected to be the Double Data Rate (DDR) mode in response to the second state of the external terminal (OPT), thereby releasing data, which has been read out of the memory mat, in response to a clock signal produced by a clock signal generation circuit in synchronism with an external clock. In the SDR mode, data are transferred via data lines in SDRAM unidirectionally and in the DDR mode, data are transferred via the data lines bidirectionally.

Abstract: By using a small number of needles and contact terminals at burn-in, electric contact check is performed between each needle and each terminal provided in each semiconductor chip, and thereby the yield of assembled products can be improved. A packaging structure in which, for example, a volatile memory chip and a nonvolatile memory chip are formed is assembled in accordance with a production scheme in which burn-in of each memory chip is performed while still under the state of a semiconductor wafer, and by forming the packaged structure using the good volatile memory chip subjected to burn-in and likewise, also, the nonvolatile memory chip. At this burn-in, contact check is performed by bringing a needle, provided in a burn-in board, into contact with, for example, six test-only signal terminals of a test circuit formed on each semiconductor chip.

Abstract: A semiconductor memory device of a DDR configuration improved in glitch immunity and the convenience of use is to be provided. It is a dynamic type RAM the operation of whose internal circuit is controlled in synchronism with a clock signal; an input circuit is provided in which a second clock signal inputted when in write operation is used to take in a plurality of write data serially inputted in response to that signal into a plurality of first latch circuits, and said first clock signal is used to take the write data taken into the first latch circuits into the second latch circuit to convey them to an input/output data bus; a logic circuit is provided to mask, in accordance with the logic of the first clock signal and the second clock signal, any noise arising at the end of the second clock signal, and a third clock signal is generated and supplied to the first latch circuits which output the write data to at least the input of the second latch circuits.