Abstract: A semiconductor device comprises: a gate insulating film 190 stacked on a semiconductor layer 130; and a gate electrode layer 230 stacked on the gate insulating film 190 and provided to apply a voltage via the gate insulating film 190 for formation of a channel in the semiconductor layer 130. The gate insulating film 190 includes: a first insulation film 192 stacked on the semiconductor layer 130; and a second insulation film 194 between the first insulation film 192 and the gate electrode layer 230. When ?1 and ?2 respectively represent relative permittivities of the first and second insulation film 192, 194, d1 [nm] and d2 [nm] represent film thicknesses of the first and second insulation film 192, 194, and Vmax [V] represents a rated voltage applicable to the gate electrode layer 230, the semiconductor device is configured to satisfy ?1<?2 and meet (C1): V ? max d ? ? 1 + ? ? ? 1 ? ? ? 2 · d ? ? 2 ? 21 ? [ MV ? / ? cm ] .

Abstract: A semiconductor device includes a substrate, a semiconductor layer that is formed on the substrate and includes a pn junction or a hetero-junction, an insulating film that is formed on the semiconductor layer to be in contact with an end of the pn junction or an end of the hetero-junction, and an electrode formed on the semiconductor layer. The insulating film includes an insulating layer that is mainly made of negatively charged microcrystal.

Abstract: The present invention provides a MIS-type semiconductor device having a ZrOxNy gate insulating film in which threshold voltage shift is suppressed, thereby achieving stable operation. In the MIS-type semiconductor device having a gate insulating film on the semiconductor layer and a gate electrode on the gate insulating film, with a gate applied voltage of 5 V or more, the gate insulating film is formed of ZrOxNy (x and y satisfy the relation: x>0, y>0, 0.8?y/x?10, and 0.8?0.59x+y?1.0). The MIS-type semiconductor device having such a gate insulating film can perform stable operation because there is no shift in the threshold voltage even if a high voltage is applied to the gate electrode.

Abstract: A semiconductor device includes a substrate, a semiconductor layer that is formed on the substrate and includes a pn junction or a hetero-junction, an insulating film that is formed on the semiconductor layer to be in contact with an end of the pn junction or an end of the hetero-junction, and an electrode formed on the semiconductor layer. The insulating film includes an insulating layer that is mainly made of negatively charged microcrystal.

Abstract: A semiconductor device comprises: a semiconductor layer; and an insulating film that is formed on the semiconductor layer. The insulating film includes an insulating layer that is mainly made of negatively charged microcrystal.

Abstract: A semiconductor device comprises: a gate insulating film 190 stacked on a semiconductor layer 130; and a gate electrode layer 230 stacked on the gate insulating film 190 and provided to apply a voltage via the gate insulating film 190 for formation of a channel in the semiconductor layer 130. The gate insulating film 190 includes: a first insulation film 192 stacked on the semiconductor layer 130; and a second insulation film 194 between the first insulation film 192 and the gate electrode layer 230. When ?1 and ?2 respectively represent relative permittivities of the first and second insulation film 192, 194, d1 [nm] and d2 [nm] represent film thicknesses of the first and second insulation film 192, 194, and Vmax [V] represents a rated voltage applicable to the gate electrode layer 230, the semiconductor device is configured to satisfy ?1<?2 and meet (C1): V ? max d ? ? 1 + ? ? ? 1 ? ? ? 2 · d ? ? 2 ? 21 ? [ MV ? / ? cm ] .

Abstract: A semiconductor device comprises: a gate insulating film 190 stacked on a semiconductor layer 130; and a gate electrode layer 230 stacked on the gate insulating film 190 and provided to apply a voltage via the gate insulating film 190 for formation of a channel in the semiconductor layer 130. The gate insulating film 190 includes: a first insulation film 192 stacked on the semiconductor layer 130; and a second insulation film 194 between the first insulation film 192 and the gate electrode layer 230. When ?1 and ?2 respectively represent relative permittivities of the first and second insulation film 192, 194, d1 [nm] and d2 [nm] represent film thicknesses of the first and second insulation film 192, 194, and Vmax [V] represents a rated voltage applicable to the gate electrode layer 230, the semiconductor device is configured to satisfy ?1<?2 and meet (C1): V ? ? max d ? ? 1 + ? ? ? 1 ? ? ? 2 · d ? ? 2 ? 21 ? [ M ? ? V ? / ? cm ] ? .

Abstract: A semiconductor device comprises: a semiconductor layer; and an insulating film that is formed on the semiconductor layer. The insulating film includes an insulating layer that is mainly made of negatively charged microcrystal.

Abstract: A manufacturing method of MIS (Metal Insulator Semiconductor)-type semiconductor device includes the steps of: forming a zirconium oxynitride (ZrON) layer; forming an electrode layer containing titanium nitride (TiN) on the zirconium oxynitride (ZrON) layer; and heating the electrode layer.

Abstract: The present invention provides a MIS-type semiconductor device having a ZrOxNy gate insulating film in which threshold voltage shift is suppressed, thereby achieving stable operation. In the MIS-type semiconductor device having a gate insulating film on the semiconductor layer and a gate electrode on the gate insulating film, with a gate applied voltage of 5 V or more, the gate insulating film is formed of ZrOxNy (x and y satisfy the relation: x>0, y>0, 0.8?y/x?10, and 0.8?0.59x+y?1.0). The MIS-type semiconductor device having such a gate insulating film can perform stable operation because there is no shift in the threshold voltage even if a high voltage is applied to the gate electrode.

Abstract: A semiconductor device comprises: a gate insulating film 190 stacked on a semiconductor layer 130; and a gate electrode layer 230 stacked on the gate insulating film 190 and provided to apply a voltage via the gate insulating film 190 for formation of a channel in the semiconductor layer 130. The gate insulating film 190 includes: a first insulation film 192 stacked on the semiconductor layer 130; and a second insulation film 194 between the first insulation film 192 and the gate electrode layer 230.

Abstract: A manufacturing method of MIS (Metal Insulator Semiconductor)-type semiconductor device includes the steps of; forming a zirconium oxynitride (ZrON) layer; forming an electrode layer containing titanium nitride (TiN) on the zirconium oxynitride (ZrON) layer; and heating the electrode layer.

Abstract: Provided is an HFET exhibiting reduced buffer leakage current. The HFET of the present invention includes an SiC substrate, an AlN layer, a graded AlGaN layer, a GaN layer, an AlGaN layer (Al compositional proportion: 20%), a source electrode, a gate electrode, and a drain electrode, wherein the AlN layer, the graded AlGaN layer, the GaN layer, and the AlGaN (Al: 20%) layer are successively stacked on the substrate, and the electrodes are formed on the AlGaN (Al: 20%) layer so as to be separated from one another. In the graded AlGaN layer, the Al compositional proportion gradually decreases from 30% (at the side facing the AlN layer) to 5% (at the side facing the GaN layer). Provision of the graded AlGaN layer reduces strain between the AlN layer and the GaN layer. Therefore, the HFET exhibits reduced buffer leakage current.