Abstract: A clock recovery device (10), including: a signal conversion circuit (20) that sequentially converts two consecutive symbols of a 2n+1 value (n is a natural number) pulse amplitude modulation signal to one symbol of an NRZ (Non Return to Zero) signal; and a clock recovery circuit (30) that generates a recovery clock signal from the NRZ signal converted by the signal conversion circuit. The signal conversion circuit converts the two consecutive symbols: to 0, when a second symbol is n?1 or less; to 1, when the second symbol is n+1 or more; to 0, when a first symbol is n?1 or less and the second symbol is n; to 1, when a first symbol is n+1 or more and the second symbol is n; to a conversion result of previous two symbols, when both of the two consecutive symbols are n.

Abstract: A clock recovery device (10), including: a signal conversion circuit (20) that sequentially converts two consecutive symbols of a 2n+1 value (n is a natural number) pulse amplitude modulation signal to one symbol of an NRZ (Non Return to Zero) signal; and a clock recovery circuit (30) that generates a recovery clock signal from the NRZ signal converted by the signal conversion circuit. The signal conversion circuit converts the two consecutive symbols: to 0, when a second symbol is n?1 or less; to 1, when the second symbol is n+1 or more; to 0, when a first symbol is n?1 or less and the second symbol is n; to 1, when a first symbol is n+1 or more and the second symbol is n; to a conversion result of previous two symbols, when both of the two consecutive symbols are n.

Abstract: A plurality of high-frequency components 12 that are provided in parallel between an input-side transmission circuit 10 and an output-side transmission circuit 11 and have pass characteristics different from each other are included, each high-frequency component 12 includes a power supply terminal 17 to which a driving power supply signal is selectively input, a signal transmitted through the input-side transmission circuit 10 is transmitted to the output-side transmission circuit 11 via a transmission path including only the high-frequency component in which the driving power supply signal is input to the power supply terminal 17 among the plurality of high-frequency components 12, and at least one of the plurality of high-frequency components 12 function as an equalizer that changes a frequency characteristic of the signal input to the input-side transmission circuit 10 due to the driving power supply signal being input to the power supply terminal 17.

Abstract: A plurality of high-frequency components 12 that are provided in parallel between an input-side transmission circuit 10 and an output-side transmission circuit 11 and have pass characteristics different from each other are included, each high-frequency component 12 includes a power supply terminal 17 to which a driving power supply signal is selectively input, a signal transmitted through the input-side transmission circuit 10 is transmitted to the output-side transmission circuit 11 via a transmission path including only the high-frequency component in which the driving power supply signal is input to the power supply terminal 17 among the plurality of high-frequency components 12, and at least one of the plurality of high-frequency components 12 function as an equalizer that changes a frequency characteristic of the signal input to the input-side transmission circuit 10 due to the driving power supply signal being input to the power supply terminal 17.