Abstract: An image reading device which reads a document as an image includes a light source unit, a light receiving unit, a transporting mechanism which relatively transports either one of the light receiving unit or the document, a light reception control unit, and an irradiation control unit which irradiates the light receiving unit with the light from the document during a first light receiving period starting from a beginning point of the charging period and a second light receiving period ending at an ending point of the charging period and which does not irradiate the light receiving unit with the light from the document between the first light receiving period and the second light receiving period.

Abstract: Delay circuit parts are disposed between a signal converting part and buffers. Since the capacities of delay elements provided respectively for the wiring of output wiring parts are different, time lag is generated respectively in the output timings of digital output signals outputted from the signal converting part relative to control clock signals. The output timings of the digital output signals shift so that the simultaneous switching of the digital output signals is prevented. Accordingly, EMI noise can be reduced without requiring the use of a special interface standard or the addition of shield members.

Abstract: An image reading device which reads a document as an image includes a light source unit, a light receiving unit, a transporting mechanism which relatively transports either one of the light receiving unit or the document, a light reception control unit, and an irradiation control unit which irradiates the light receiving unit with the light from the document during a first light receiving period starting from a beginning point of the charging period and a second light receiving period ending at an ending point of the charging period and which does not irradiate the light receiving unit with the light from the document between the first light receiving period and the second light receiving period.

Abstract: First, image data is converted using a first table storing conversion values in addresses corresponding to at least input values: u(k) represented by u(k)=ab?k (where a and b are constants and k is 0, 1, 2, . . . m) of all input values and linear interpolation. Next, a second table storing conversion values set in response to the image data provided by conversion using the first table in addresses corresponding to at least input values: v(k) represented by v(k)=ck+d (where c and d constants and k is 0, 1, 2, . . . n) of all input values is stored in memory. Next, the image data provided by conversion using the first table is again converted using the second table and linear interpolation.

Abstract: An image reading device that can correctly take in image data is achieved. The image reading device has: (A) a CCD sensor for reading an image; (B) a clock generator that generates a frequency modulated clock; (C) a control circuit that operates in accordance with the frequency modulated clock, controls the CCD sensor, outputs a detection result of the CCD sensor as a data signal, and outputs a take-in clock synchronized with the data signal; and (D) a main circuit that operates in accordance with a separate clock from the frequency modulated clock, to which the data signal and the take-in clock outputted from the control circuit are inputted, and that takes in the data signal based on the take-in clock.

Abstract: In a flat bed type scanner, while a control unit (24) for generating a secondary control signal and for controlling a CCD (22) is separated from an image processing ASIC (46) for generating a primary clock signal as a base signal of the secondary control signal, this scanner is arranged so as to generate the secondary control signal having the short pulse width from the primary clock signal having the long pulse width. This scanner employs such an arrangement that the primary clock signal having the long pulse width is transmitted via an FFC (40) which electrically connects the image processing ASIC (46) with the control unit (24).

Abstract: First, image data is converted using a first table storing conversion values in addresses corresponding to at least input values: u(k) represented by u(k)=ab−k (where a and b are constants and k is 0, 1, 2, . . . m) of all input values and linear interpolation. Next, a second table storing conversion values set in response to the image data provided by conversion using the first table in addresses corresponding to at least input values: v(k) represented by v(k)=ck+d (where c and d constants and k is 0, 1, 2, . . . n) of all input values is stored in memory. Next, the image data provided by conversion using the first table is again converted using the second table and linear interpolation.

Abstract: Delay circuit parts are disposed between a signal converting part and buffers. Since the capacities of delay elements provided respectively for the wiring of output wiring parts are different, time lag is generated respectively in the output timings of digital output signals outputted from the signal converting part relative to control clock signals. The output timings of the digital output signals shift so that the simultaneous switching of the digital output signals is prevented. Accordingly, EMI noise can be reduced without requiring the use of a special interface standard or the addition of shield members.

Abstract: In a flat bed type scanner, while a control unit (24) for generating a secondary control signal and for controlling a CCD (22) is separated from an image processing ASIC (46) for generating a primary clock signal as a base signal of the secondary control signal, this scanner is arranged so as to generate the secondary control signal having the short pulse width from the primary clock signal having the long pulse width. This scanner employs such an arrangement that the primary clock signal having the long pulse width is transmitted via an FFC (40) which electrically connects the image processing ASIC (46) with the control unit (24).