Patents by Inventor Takao Imura

Takao Imura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4384342
    Abstract: A lookahead (guessahead) prefetching technique is used to reduce the average access time, for accessing memory modules when program addresses are modified into effective addresses for addressing the modules. A first memory address register stores the column address and module designation portions of the current effective address, a second memory address register stores the row address portion of the current effective address, and a third memory address register stores the module designation portion of the prior effective address. Since the same module is frequently accessed many times in succession, the average access time is reduced by starting an access based upon the contents of the second and third memory address registers without waiting until the column address and module designation portions of the current effective address are available for storage in the first memory address register.
    Type: Grant
    Filed: October 29, 1980
    Date of Patent: May 17, 1983
    Assignee: Panafacom Limited
    Inventors: Takao Imura, Shigeru Koyanagi, Yoshihiro Joda