Patents by Inventor Takao Matsuura

Takao Matsuura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8105878
    Abstract: A thermosetting tape is adopted as a dicing tape and, after package dicing, the thermosetting tape is heated, then a desired one of divided CSPs is picked up by an inverting collet. Since the thermosetting tape is heated o a predetermined temperature so that its adhesive force becomes zero, the CSP can be picked up by the inverting collet without peeling it off from the thermosetting tape. Thus, peel-off charging does not occur and therefore it is not necessary to perform a destaticizing process. As a result, it is possible to improve the production efficiency in assembling the semiconductor device (CSP).
    Type: Grant
    Filed: August 3, 2007
    Date of Patent: January 31, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Haruhiko Harada, Takao Matsuura
  • Publication number: 20110291692
    Abstract: Provided is an apparatus for automatically detecting a failure position on a specified wiring line. The apparatus and a method for automatically detecting the failure position even on a long wiring line by applying a probe and an electron beam onto a sample and using an image of the current absorbed by the sample are provided. The apparatus obtains an absorbed current image, while laterally moving at right angle with the probe applied onto the sample, and based on the obtained absorbed current image, correction is performed by means of both an image shift and a stage. Countermeasures are taken, using a stage not having a sample rotating stage, against factors including a hardware factor of not moving at a correct angle, such as backlash, the wiring line is accurately and continuously displayed even when the apparatus moves to the ends of the long wiring line, and the failure position is detected, while the apparatus automatically reciprocates several times between the both ends of the wiring line.
    Type: Application
    Filed: January 20, 2010
    Publication date: December 1, 2011
    Inventors: Tohru Ando, Masaaki Komori, Takao Matsuura
  • Publication number: 20080076210
    Abstract: A thermosetting tape is adopted as a dicing tape and, after package dicing, the thermosetting tape is heated, then a desired one of divided CSPs is picked up by an inverting collet. Since the thermosetting tape is heated o a predetermined temperature so that its adhesive force becomes zero, the CSP can be picked up by the inverting collet without peeling it off from the thermosetting tape. Thus, peel-off charging does not occur and therefore it is not necessary to perform a destaticizing process. As a result, it is possible to improve the production efficiency in assembling the semiconductor device (CSP).
    Type: Application
    Filed: August 3, 2007
    Publication date: March 27, 2008
    Inventors: Haruhiko Harada, Takao Matsuura
  • Patent number: 7015069
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: March 21, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Publication number: 20050127535
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Application
    Filed: February 2, 2005
    Publication date: June 16, 2005
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Patent number: 6897097
    Abstract: The semiconductor device comprises: a tub for supporting a semiconductor chip; a sealing body formed by sealing the semiconductor chip with a resin; a plurality of leads made of a copper alloy, exposed to the back face of the sealing body, and having a soldered layer on the exposed mounted face; and wires for connecting the pads of the semiconductor chip and the corresponding leads. In the manufacture method, the sealing body is polished, after resin-molded, at its back face with a brush to form the two widthwise edge portions, as exposed from the back face of the sealing body, of the lead into rounded faces, and the mounted face of the lead including the rounded faces is protruded at its central portion from the back face of the sealing body thereby to improve the connection reliability at the packaging time.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: May 24, 2005
    Assignees: Hitachi, Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Takao Matsuura, Yoshihiko Yamaguchi, Shouichi Kobayashi, Kouji Tsuchiya
  • Patent number: 6872597
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: March 29, 2005
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Publication number: 20040164428
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 26, 2004
    Applicants: Renesas Technology Corp., Hitachi ULSI System Co., Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Patent number: 6723583
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Grant
    Filed: June 4, 2003
    Date of Patent: April 20, 2004
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co. Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Publication number: 20040058479
    Abstract: To improve the connection reliability at the time of packaging a semiconductor device and to make the method management easy in a semiconductor device manufacturing method.
    Type: Application
    Filed: September 25, 2003
    Publication date: March 25, 2004
    Applicants: Hitachi, Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Takao Matsuura, Yoshihiko Yamaguchi, Shouichi Kobayashi, Kouji Tsuchiya
  • Patent number: 6667193
    Abstract: To improve the connection reliability at the time of packaging a semiconductor device and to make the method management easy in a semiconductor device manufacturing method. The semiconductor device comprises: a tub 1e for supporting a semiconductor chip 2; a sealing body 3 formed by sealing the semiconductor chip 2 with a resin; a plurality of leads 1a made of a copper alloy, exposed to the back face 3a of the sealing body 3, and having a soldered layer 8 on the exposed mounted face 1d; and wires 4 for connecting the pads 2a of the semiconductor chip 2 and the corresponding leads 1a.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: December 23, 2003
    Assignees: Hitachi, Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Takao Matsuura, Yoshihiko Yamaguchi, Shouichi Kobayashi, Kouji Tsuchiya
  • Publication number: 20030205797
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Application
    Filed: June 4, 2003
    Publication date: November 6, 2003
    Applicants: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Patent number: 6596561
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Grant
    Filed: November 15, 2001
    Date of Patent: July 22, 2003
    Assignees: Hitachi, Ltd., Hitachi USLI Systems Co., Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Patent number: 6590276
    Abstract: The semiconductor device comprises: a tub for supporting a semiconductor chip; a sealing body formed by sealing the semiconductor chip with a resin; a plurality of leads made of a copper alloy, exposed to the back face of the sealing body, and having a soldered layer on the exposed mounted face; and wires for connecting the pads of the semiconductor chip and the corresponding leads. In the manufacture method, the sealing body is polished, after resin-molded, at its back face with a brush to form the two widthwise edge portions, as exposed from the back face of the sealing body, of the lead into rounded faces, and the mounted face of the lead including the rounded faces is protruded at its central portion from the back face of the sealing body thereby to improve the connection reliability at the packaging time.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: July 8, 2003
    Assignees: Hitachi, Ltd., Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Takao Matsuura, Yoshihiko Yamaguchi, Shouichi Kobayashi, Kouji Tsuchiya
  • Publication number: 20020106836
    Abstract: To improve the connection reliability at the time of packaging a semiconductor device and to make the method management easy in a semiconductor device manufacturing method.
    Type: Application
    Filed: March 29, 2002
    Publication date: August 8, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Takao Matsuura, Yoshihiko Yamaguchi, Shouichi Kobayashi, Kouji Tsuchiya
  • Publication number: 20020102771
    Abstract: To improve the connection reliability at the time of packaging a semiconductor device and to make the method management easy in a semiconductor device manufacturing method.
    Type: Application
    Filed: March 29, 2002
    Publication date: August 1, 2002
    Applicant: Hitachi, Ltd. and Hitachi Yonezawa Electronics Co. , Ltd.
    Inventors: Takao Matsuura, Yoshihiko Yamaguchi, Shouichi Kobayashi, Kouji Tsuchiya
  • Publication number: 20020074650
    Abstract: The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.
    Type: Application
    Filed: November 15, 2001
    Publication date: June 20, 2002
    Inventors: Noriyuki Takahashi, Masayuki Suzuki, Kouji Tsuchiya, Takao Matsuura, Takanori Hashizume, Masahiro Ichitani, Kazunari Suzuki, Takafumi Nishita, Kenichi Imura, Takashi Miwa
  • Patent number: 6399423
    Abstract: The semiconductor device comprises: a tub for supporting a semiconductor chip; a sealing body formed by sealing the semiconductor chip with a resin; a plurality of leads made of a copper alloy, exposed to the back face of the sealing body, and having a soldered layer on the exposed mounted face; and wires for connecting the pads of the semiconductor chip and the corresponding leads. In the manufacture method, the sealing body is polished, after resin-molded, at its back face with a brush to form the two widthwise edge portions, as exposed from the back face of the sealing body, of the lead into rounded faces, and the mounted face of the lead including the rounded faces is protruded at its central portion from the back face of the sealing body thereby to improve the connection reliability at the packaging time.
    Type: Grant
    Filed: December 12, 2000
    Date of Patent: June 4, 2002
    Assignees: Hitachi, Ltd, Hitachi Yonezawa Electronics Co., Ltd.
    Inventors: Takao Matsuura, Yoshihiko Yamaguchi, Shouichi Kobayashi, Kouji Tsuchiya
  • Publication number: 20010041424
    Abstract: To improve the connection reliability at the time of packaging a semiconductor device and to make the method management easy in a semiconductor device manufacturing method.
    Type: Application
    Filed: December 12, 2000
    Publication date: November 15, 2001
    Inventors: Takao Matsuura, Yoshihiko Yamaguchi, Shouichi Kobayashi, Kouji Tsuchiya