Patents by Inventor Takao Okubo

Takao Okubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090138848
    Abstract: A general-purpose rewriting process (patch process) is provided. In a program code, a command statement execution place and initialization of a character string variable of an argument of the command statement execution place are detected, and a range to be replaced is extracted on the basis of the detected place. In an adding operation of the detected character string, a portion (character string) to be added is extracted, and it is determined whether the portion is a fixed character string invariable) Based on information obtained by determining whether the added portion is invariable, a parameterized prepared command statement may be dynamically formed. In execution of the command statement, original function calling may be replaced with function calling using a prepared command statement. By the patch process, a byte code of a target program is rewritten and executed.
    Type: Application
    Filed: November 18, 2008
    Publication date: May 28, 2009
    Applicant: Fujitsu Limited
    Inventor: Takao OKUBO
  • Patent number: 6757853
    Abstract: A memory apparatus packaged in one package is provided which includes first data terminals, first address terminals, a status terminal, and memory chips integrated in one semiconductor substrate, one of the memory chips being a nonvolatile memory. Each of the memory chips includes data terminals and address terminals. The data terminals of each of the memory chips are connected to the first data terminals, and the address terminals of each of the memory chips are connected to the first address terminals. The status terminal is arranged to output a status signal which indicates when the nonvolatile memory is in a ready status or in a busy status.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: June 29, 2004
    Assignees: Renesas Technology Corporation, Hitachi ULSI Systems Co., Ltd.
    Inventors: Masashi Wada, Takao Okubo, Takeshi Furuno
  • Publication number: 20030018935
    Abstract: A memory apparatus packaged in one package is provided which includes first data terminals, first address terminals, a status terminal, and memory chips integrated in one semiconductor substrate, one of the memory chips being a nonvolatile memory. Each of the memory chips includes data terminals and address terminals. The data terminals of each of the memory chips are connected to the first data terminals, and the address terminals of each of the memory chips are connected to the first address terminals. The status terminal is arranged to output a status signal which indicates when the nonvolatile memory is in a ready status or in a busy status.
    Type: Application
    Filed: September 17, 2002
    Publication date: January 23, 2003
    Inventors: Masashi Wada, Takao Okubo, Takeshi Furuno
  • Patent number: 6477671
    Abstract: A semiconductor memory (1) comprising a plurality of memory blocks (2 and 3) provided with a lot of memory cells, a data input/output buffer (7), and first control means (11) for controlling the rewriting and reading of data for the memory cells is provided with first storage means (30) for designating part of the defective memory blocks and detection means (32) for detecting the access to a defective memory block designated by the first storage means in accordance with an address signal. In this case, when the detection means detects the access to a defective memory, the first control means inhibits the data rewrite operation for the instruction of the data rewrite operation and inhibits the data output operation of the data input/output buffer for the instruction of the data read operation.
    Type: Grant
    Filed: May 1, 2001
    Date of Patent: November 5, 2002
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Masashi Wada, Takao Okubo, Takeshi Furuno
  • Patent number: 6421279
    Abstract: A semiconductor file system features a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating correspondence between physical and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information. The controller determines a physical sector address.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: July 16, 2002
    Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi USLI Engineering Corp.
    Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
  • Publication number: 20020051394
    Abstract: A semiconductor file system features a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating correspondence between physical and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information. The controller determines a physical sector address.
    Type: Application
    Filed: August 13, 2001
    Publication date: May 2, 2002
    Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
  • Publication number: 20010016928
    Abstract: A semiconductor memory (1) comprising a plurality of memory blocks (2 and 3) provided with a lot of memory cells, a data input/output buffer (7), and first control means (11) for controlling the rewriting and reading of data for the memory cells is provided with first storage means (30) for designating part of the defective memory blocks and detection means (32) for detecting the access to a defective memory block designated by the first storage means in accordance with an address signal. In this case, when the detection means detects the access to a defective memory, the first control means inhibits the data rewrite operation for the instruction of the data rewrite operation and inhibits the data output operation of the data input/output buffer for the instruction of the data read operation.
    Type: Application
    Filed: May 1, 2001
    Publication date: August 23, 2001
    Inventors: Masashi Wada, Takao Okubo, Takeshi Furuno
  • Patent number: 6275436
    Abstract: A control method and system when a flash memory is used. as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.
    Type: Grant
    Filed: May 23, 2000
    Date of Patent: August 14, 2001
    Assignees: Hitachi, LTD, Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
  • Patent number: 6266792
    Abstract: A semiconductor memory (1) comprising a plurality of memory blocks (2 and 3) provided with a lot of memory cells, a data-input/output buffer (7), and first control means (11) for controlling the rewriting and reading of data for the memory cells is provided with first storage means (30) for designating part of the defective memory blocks and detection means (32) for detecting the access to a defective memory block designated by the first storage means in accordance with an address signal. In this case, when the detection means detects the access to a defective memory, the first control means inhibits the data rewrite operation for the instruction of the data rewrite operation and inhibits the data output operation of the data input/output buffer for the instruction of the data read operation.
    Type: Grant
    Filed: October 26, 1999
    Date of Patent: July 24, 2001
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Masashi Wada, Takao Okubo, Takeshi Furuno
  • Patent number: 6199111
    Abstract: In a distributed client-server system a client is connected to an arbitrary server using a communication module common to a plurality of servers and it uses data, etc. of each server by switching over its connection. At this time basically there is no need for communication and the replication of data between the servers.
    Type: Grant
    Filed: November 18, 1997
    Date of Patent: March 6, 2001
    Assignee: Fujitsu Limited
    Inventors: Hirotaka Hara, Takahide Matsutsuka, Nobuyuki Kanaya, Takao Okubo, Sanya Uehara
  • Patent number: 6141665
    Abstract: A job model with which an organization model representing an organization structure, a document model representing a document structure, and a work model representing a work procedure are correlated, is stored independent from a service model defining each service. When a service is performed, with reference to the job model corresponding to the service model, a service executing module causes a tool control module to control a tool. Thus, the required service is accomplished.
    Type: Grant
    Filed: February 14, 1997
    Date of Patent: October 31, 2000
    Assignee: Fujitsu Limited
    Inventors: Hirotaka Hara, Sanya Uehara, Takao Okubo, Nobuyuki Kanaya, Yuuji Hotta
  • Patent number: 6078520
    Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.
    Type: Grant
    Filed: July 21, 1999
    Date of Patent: June 20, 2000
    Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI
    Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
  • Patent number: 6032237
    Abstract: A non-volatile memory, such as a flash memory card, using a rewritable non-volatile memory is provided with an improved write-protect arrangement. The non-volatile memory includes a collectively electrically erasable and writable memory (e.g., a flash memory), a reset IC for generating a power-on reset signal upon turn-on of the power supply, and a card controller for performing control between each flash memory device and a memory card interface. The flash memory is set with a write protect save register written with an address of an area desired to be subjected to write protect, the write protect save register belonging to an attribute area, and a protect range is set from the system. Since the address to be write-protected is itself written in the non-volatile flash memory, the address will continue to be stored, even if the power is turned off. A method for software write protection control is also provided.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: February 29, 2000
    Assignees: Hitachi Ltd., Hitachi ULSI Engineering Corporation, Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Manabu Inoue, Takao Okubo, Shigeru Kadowaki, Satoru Nakanishi, Masamichi Kishi, Shigeru Suzuki, Yasuro Kubota, Hironori Iwasaki
  • Patent number: 5973964
    Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: October 26, 1999
    Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Co., Ltd.
    Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
  • Patent number: 5862083
    Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: January 19, 1999
    Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
  • Patent number: 5530673
    Abstract: A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data.
    Type: Grant
    Filed: April 8, 1994
    Date of Patent: June 25, 1996
    Assignees: Hitachi, Ltd., Hitachi Keiyo Engineering Co., Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tsunehiro Tobita, Jun Kitahara, Takashi Tsunehiro, Kunihiro Katayama, Ryuichi Hattori, Yukihiro Seki, Hajime Yamagami, Takashi Totsuka, Takeshi Wada, Yosio Takaya, Manabu Saito, Kenichi Kaki, Takao Okubo, Takashi Kikuchi, Masamichi Kishi, Takeshi Suzuki, Shigeru Kadowaki
  • Patent number: 5440718
    Abstract: Compressor/expander circuits which are built in a common semiconductor substrate along with a random access memory unit function so as to realize compression/expansion processes merely through the internal data transfer controls between the circuits and the random access memory unit as based on built-in control unit. This endows the temporary storage of data and the compression/expansion processes hereof with continuities, and achieves higher speeds for the compression/expansion processes.
    Type: Grant
    Filed: September 19, 1994
    Date of Patent: August 8, 1995
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Takehiko Kumagai, Takashi Kikuchi, Takao Okubo, Yasuyuki Fuse
  • Patent number: 4790520
    Abstract: A vibration insulating device to be installed between two members of a vibration system of an automotive vehicle. The device consists of an annular elastic member disposed between coaxial inner and outer cylindrical members and located coaxial with the outer cylindrical member. The elastic member is formed at its outer peripheral surface with a deep annular groove coaxial with the outer cylindrical member which groove is covered with the outer cylindrical member to define an annular hollow chamber. A generally cylindrical flexible diaphragm member is secured between the outer cylindrical member and the elastic member in such a manner that its central annular section divides the hollow chamber into a radially outward gas chamber and a radially inward liquid chamber, thereby effectively absorbing even high frequency small amplitude vibration transmitted to the device under deformation of the flexible diaphragm member.
    Type: Grant
    Filed: November 24, 1986
    Date of Patent: December 13, 1988
    Assignees: Nissan Motor Co., Ltd., Bridgestone Corporation
    Inventors: Atsuo Tanaka, Takao Okubo, Takao Ushijima, Takeshi Noguchi