Abstract: A ferroelectric memory capable of writing data at a small operation voltage has an insulated-gate field effect transistor, a ferroelectric film, and a pair of capacitor electrodes formed on the ferroelectric film and facing each other, one of the pair of capacitor electrodes being electrically connected to the insulated gate. A ferroelectric memory device with a simple structure has an insulated-gate field effect transistor including a source, a drain, and an insulated gate, and a ferroelectric capacitor connected between the drain and the insulated gate.

Abstract: A method for fabricating a compound semiconductor device includes the steps of depositing a first group III-V compound semiconductor layer on a surface of a Si substrate while holding a temperature of the Si substrate at a first temperature, depositing a second group III-V compound semiconductor layer on the first group III-V compound semiconductor layer while holding the temperature of the substrate at a second, higher temperature, and depositing a third group III-V compound semiconductor layer on the second group III-V compound semiconductor layer while holding the temperature of the substrate at a third temperature higher than said second temperature, wherein the second group III-V compound semiconductor layer contains Al.

Abstract: The source region and gate electrode of a field effect transistor including a drain region and a gate electrode in addition to the source region are connected by a first ferroelectric capacitor. The drain region and gate electrode are connected by a second ferroelectric capacitor. A ferroelectric memory device suitable for high integration is provided.

Abstract: A method for fabricating a compound semiconductor device includes the steps of depositing a first group III-V compound semiconductor layer on a surface of a Si substrate while holding a temperature of the Si substrate at a first temperature, depositing a second group III-V compound semiconductor layer on the first group III-V compound semiconductor layer while holding the temperature of the substrate at a second, higher temperature, and depositing a third group III-V compound semiconductor layer on the second group III-V compound semiconductor layer while holding the temperature of the substrate at a third temperature higher than said second temperature, wherein the second group III-V compound semiconductor layer contains Al.

Abstract: A bipolar transistor includes a base region made of silicon crystal doped with a first impurity to a first level so as to establish a first carrier concentration in the base region and an emitter region made of silicon crystal doped with a second impurity to a second level substantially larger than the first level by a predetermined factor so as to establish a second carrier concentration in the emitter region, in which the second impurity exceeds the solubility limit of the second impurity in silicon crystal. The first and second levels are chosen in such a range that a difference in the carrier concentrations between the emitter region and the base region decreases substantially with increasing impurity level in the base region.

Abstract: A method of fabricating a semiconductor device comprises the steps of growing a first layer of a group III-V compound semiconductor material on a substrate by a vapor phase deposition process by setting the temperature at a first temperature, raising the temperature from the first temperature to a second, higher temperature, growing a second layer of a group III-V compound semiconductor material on the first layer, wherein the step of raising the temperature is conducted while supplying a source gas for the group V element under a condition, determined in terms of a total pressure and a partial pressure of the source gas, such that the condition falls within a region defined by a first condition wherein the total pressure is set to 76 Torr and the partial pressure is set to 0.35 Torr, a second condition wherein the total pressure is set to 760 Torr and the partial pressure is set to 0.6 Torr, a third condition wherein the total pressure is set to 760 Torr and the partial pressure is set to 5.

Abstract: A bipolar transistor includes a base region made of silicon crystal doped with a first impurity to a first level so as to establish a first carrier concentration in the base region and an emitter region made of silicon crystal doped with a second impurity to a second level substantially larger than the first level by a predetermined factor so as to establish a second carrier concentration in the emitter region, in which the second impurity exceeds the solubility limit of the second impurity in silicon crystal. The first and second levels are chosen in such a range that a difference in the carrier concentrations between the emitter region and the base region decreases substantially with increasing impurity level in the base region.

Abstract: A semiconductor device comprises a substrate of a first material, a buffer layer of a second, group III-V semiconductor material provided on the substrate epitaxially, and a barrier layer of a third, group III-V compound semiconductor material different from the first and second materials and having a resistivity substantially larger than the resistivity of the buffer layer. The barrier layer further has a second lattice constant different from the lattice constant of the buffer layer and characterized by a band gap substantially larger than the band gap of the buffer layer. The barrier layer is provided on the buffer layer directly and an active layer of a fourth, group III-V compound semiconductor layer is provided on the barrier layer. On the active layer, an active device is provided such that the active device at least has a part formed in the active layer.

Abstract: A bipolar transistor includes a base region made of silicon crystal doped with a first impurity to a first level so as to establish a first carrier concentration in the base region and an emitter region made of silicon crystal doped with a second impurity to a second level substantially larger than the first level by a predetermined factor so as to establish a second carrier concentration in the emitter region, in which the second impurity exceeds the solubility limit of the second impurity in silicon crystal. The first and second levels are chosen in such a range that a difference in the carrier concentrations between the emitter region and the base region decreases substantially with increasing impurity level in the base region.

Abstract: A silicon carbide layer between a silicon substrate or layer and a metal layer because silicon carbide has many properties similar to those of silicon, has a very slow diffusion rate of a metal through the silicon carbide, or prevents a diffusion of a metal into the silicon, and can be deposited by CVD, which has an advantage of a good coverage over a step portion such as a contact window.

Abstract: A method of fabricating an X-ray exposure mask including the steps of forming a .beta.-SiC membrane by chemcial vapor deposition and simultaneously doping the membrane with at least one of phosphorous, boron, nitrogen and oxygen.

Abstract: A semiconductor device comprises a substrate, a compound semiconductor layer provided on the substrate, and an active region formed on the compound semiconductor layer. The substrate in turn comprises a first semiconductor layer of a first semiconductor material, a second semiconductor layer of a second semiconductor material and provided on the first semiconductor layer, and a third semiconductor layer provided on the second semiconductor layer. The third semiconductor layer has a plurality of segments each defined by a pair of side walls that extend substantially perpendicular to the third semiconductor layer. The plurality of segments have a plurality of first-type segments and a plurality of second-type segments wherein the first- and second-type segments are arranged alternately when viewed in a direction parallel to the third semiconductor layer.

Abstract: A semiconductor device comprises a first semiconductor layer made of a single crystal of a first semiconductor material having a first lattice constant, a second semiconductor layer comprising a single crystal of a second semiconductor material having a second lattice constant which is different from the first lattice constant, a third semiconductor layer made of a third semiconductor material having a third lattice constant which is different from the first lattice constant, the third semiconductor layer being grown heteroepitaxially on the first semiconductor layer, a fourth semiconductor layer made of a fourth semiconductor material having a fourth lattice constant which is different from the third lattice constant, the fourth semiconductor layer being grown heteroepitaxially on the third semiconductor layer in a manner such that the second semiconductor layer is provided thereon, for preventing a first group of dislocations created in the third semiconductor layer from reaching the second semiconductor la

Abstract: A method for fabricating a crystal imperfection free silicon carbide (SiC) film electrically insulated from silicon substrate. A SiC film is heteroepitaxially grown over a silicon substrate, and set into a jig made of Teflon. The jig holds the substrate by its periphery, and exposes the bottom surface of the substrate which is opposite to the SiC film. The semiconductor substrate is etched off from its bottom side, and the lower surface of the SiC film is exposed. Silicon dioxide film is deposited to the lower surface of the SiC film and a second silicon substrate is adhered to the silicon dioxide film by applying pulse voltage. The surface of the SiC film fabricated in this way is never contacted to the silicon substrate, therefore, it is free from the crystal imperfections which occurs close to the contact surface to the silicon substrate. Accordingly, the SiC film formed in such a way is desirable for fabricating semiconductor devices.

Abstract: A method of forming a semiconductor device on a silicon carbide layer comprises steps of introducing an impurity into selected parts of the silicon carbide layer, and oxidizing the silicon carbide layer by annealing in an atmosphere containing oxygen.

Abstract: A method of forming a semiconductor thin layer on a silicon substrate comprising the steps of depositing a first amorphous layer of a compound semiconductor (e.g., GaAs) on the silicon substrate, and growing a first epitaxial layer of the compound semiconductor on the amorphous layer, characterized in that the method comprises the steps of: after the epitaxial growth step, depositing a second amorphous layer of the compound semiconductor on the first epitaxial layer, and growing a second epitaxial layer of the compound semiconductor on the second amorphous layer. The obtained GaAs/Si substrate has a reduced dislocation density.

Abstract: A single crystalline silicon carbide (.beta.-SiC) layer having a thickness greater than 1 .mu.m is grown on a silicon substrate by the following method of the present invention. The silicon substrate is provided in a reactor chamber, and the reactor chamber is evacuated and maintained at a reduced atmospheric pressure during the growing processes. While flowing a mixed gas containing acetylene into the reactor chamber, the substrate is heated up at a temperature range from 800.degree. to 1000.degree. C., preferable in a range from 810.degree. to 850.degree. C., whereby a buffer layer of carbonized silicon having a thickness of 60 to 100 .ANG. is grown on the substrate. Thereafter, the flowing gas is changed to a mixed gas containing hydrocarbon and chlorosilane, and the substrate temperature is raised to a temperature from 850.degree. to 950.degree. C. In this process, a single crystalline .beta.-SiC layer can be grown on the buffer layer, and a thickness of a few .mu.m for the grown .beta.