Abstract: An apparatus for setting a planned trajectory includes a processor configured to identify a travel lane on which a vehicle is traveling, detect, as a specific section, a section lacking at least one of left and right lane lines of the travel lane of the vehicle in a planned travel section, set at least one candidate of a planned trajectory to be traveled by the vehicle in the specific section, the at least one candidate including a candidate based on an existing one of the lane lines or a road edge, and set, of the set candidate, a candidate having a minimum variation in curvature or a minimum offset distance in a direction perpendicular to a travel direction of the vehicle at parts connected to the planned trajectory in sections ahead of and behind the specific section as the planned trajectory of the specific section.

Abstract: A light source control system includes a plurality of light sources, and a plurality of light source control devices. The light source control devices include a plurality of main light source control devices that transmits command signals to the other light source control devices. Each main light source control device includes a collision determination circuit that determines whether data of the command signal transmitted through a bus has collided with other data, and a restoration circuit that executes a restoration operation in the case of a collision. The collision determination circuit includes an edge detection circuit that detects change timing of a signal representing the data of the command signal, an area setting circuit that sets a collision determination area in accordance with the detected change timing detected, and a collision detection circuit that detects the presence or absence of a collision in the set collision determination area.

Abstract: The invention provides a semiconductor device capable of diagnosing communication network quality. Disclosed is a semiconductor device that is coupled to a light source, the semiconductor device including a signal processing unit that is coupled to an interface module and transmits and receives a command signal to increase or decrease illumination intensity of the light source and a deterioration detector that detects deterioration of the interface module, based on whether or not change timing of a signal representing data of a command signal received by the interface module falls within a predetermined interval.

Abstract: A light source control system includes a plurality of light sources, and a plurality of light source control devices. The light source control devices include a plurality of main light source control devices that transmits command signals to the other light source control devices. Each main light source control device includes a collision determination circuit that determines whether data of the command signal transmitted through a bus has collided with other data, and a restoration circuit that executes a restoration operation in the case of a collision. The collision determination circuit includes an edge detection circuit that detects change timing of a signal representing the data of the command signal, an area setting circuit that sets a collision determination area in accordance with the detected change timing detected, and a collision detection circuit that detects the presence or absence of a collision in the set collision determination area.

Abstract: A light source control system includes a plurality of light sources, and a plurality of light source control devices. The light source control devices include a plurality of main light source control devices that transmits command signals to the other light source control devices. Each main light source control device includes a collision determination circuit that determines whether data of the command signal transmitted through a bus has collided with other data, and a restoration circuit that executes a restoration operation in the case of a collision. The collision determination circuit includes an edge detection circuit that detects change timing of a signal representing the data of the command signal, an area setting circuit that sets a collision determination area in accordance with the detected change timing detected, and a collision detection circuit that detects the presence or absence of a collision in the set collision determination area.

Abstract: An object of the present invention is to provide a light source control system capable of detecting a collision of data. Alight source control system includes a plurality of light sources, and a plurality of light source control devices that is provided corresponding to the light sources and is provided communicable with each other through a bus. The light source control devices include a plurality of main light source control devices that transmits command signals to the other light source control devices. Each of the main light source control devices includes a collision determination circuit that determines whether or not data of the command signal transmitted through the bus has collided with another, and a restoration circuit that executes a restoration operation in the case where the data has collided with another on the basis of the determination result of the collision determination circuit.

Abstract: The invention provides a semiconductor device capable of diagnosing communication network quality. Disclosed is a semiconductor device that is coupled to a light source, the semiconductor device including a signal processing unit that is coupled to an interface module and transmits and receives a command signal to increase or decrease illumination intensity of the light source and a deterioration detector that detects deterioration of the interface module, based on whether or not change timing of a signal representing data of a command signal received by the interface module falls within a predetermined interval.

Abstract: Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b?2, and Formula (2), b>0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.

Abstract: Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b?2, and Formula (2), b>0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.

Abstract: An embodiment of the present invention is a microcrystalline semiconductor film having a thickness of more than or equal to 70 nm and less than or equal to 100 nm and including a crystal grain partly projecting from a surface of the microcrystalline semiconductor film. The crystal grain has an orientation plane and includes a crystallite having a size of 13 nm or more. Further, the film density of the microcrystalline semiconductor film is higher than or equal to 2.25 g/cm3 and lower than or equal to 2.35 g/cm3, preferably higher than or equal to 2.30 g/cm3 and lower than or equal to 2.33 g/cm3.

Abstract: An object is to provide a manufacturing method of a microcrystalline silicon film with improved adhesion between an insulating film and the microcrystalline silicon film. The microcrystalline silicon film is formed in the following manner. Over an insulating film, a microcrystalline silicon grain having a height that allows the microcrystalline silicon grain to be completely oxidized by later plasma oxidation (e.g., a height greater than 0 nm and less than or equal to 5 nm), or a microcrystalline silicon film or an amorphous silicon film having a thickness that allows the microcrystalline silicon film or the amorphous silicon film to be completely oxidized by later plasma oxidation (e.g., a thickness greater than 0 nm and less than or equal to 5 nm) is formed.

Abstract: Provided is a method for manufacturing a semiconductor device, in which a degradation of characteristics of a thin film transistor can be suppressed by performing plasma oxidation treatment on a gate insulating film containing nitrogen. An embodiment of the present invention is a method for manufacturing a semiconductor device comprising a thin film transistor including a gate electrode, a gate insulating film containing nitrogen, and a channel region in microcrystalline semiconductor films. The method includes the steps of performing plasma treatment on the gate insulating film in an oxidizing gas atmosphere containing hydrogen and an oxidizing gas containing an oxygen atom, and forming the microcrystalline semiconductor film over the gate insulating film. Formula (1), a/b?2, and Formula (2), b>0, are satisfied, where the amount of hydrogen and the amount of the oxidizing gas in the oxidizing gas atmosphere are a and b, respectively.

Abstract: An embodiment of the present invention is a microcrystalline semiconductor film having a thickness of more than or equal to 70 nm and less than or equal to 100 nm and including a crystal grain partly projecting from a surface of the microcrystalline semiconductor film. The crystal grain has an orientation plane and includes a crystallite having a size of 13 nm or more. Further, the film density of the microcrystalline semiconductor film is higher than or equal to 2.25 g/cm3 and lower than or equal to 2.35 g/cm3, preferably higher than or equal to 2.30 g/cm and lower than or equal to 2.33 g/cm3.

Abstract: An object is to provide a manufacturing method of a microcrystalline silicon film with improved adhesion between an insulating film and the microcrystalline silicon film. The microcrystalline silicon film is formed in the following manner. Over an insulating film, a microcrystalline silicon grain having a height that allows the microcrystalline silicon grain to be completely oxidized by later plasma oxidation (e.g., a height greater than 0 nm and less than or equal to 5 nm), or a microcrystalline silicon film or an amorphous silicon film having a thickness that allows the microcrystalline silicon film or the amorphous silicon film to be completely oxidized by later plasma oxidation (e.g., a thickness greater than 0 nm and less than or equal to 5 nm) is formed.

Abstract: A data processing apparatus and a data processing method for implementing data-tuning rapidly, in which when CPU is operating based on PROM data, it permits operation to implement while referring to data which is rewritten to RAM without stop of the operation. There is provided a CPU core for performing program operation for the purpose of implementing of data processing, a PROM for storing data which is referred at the time of data processing, a register for memorizing a data-stored-address, and a comparator for comparing an address.

Abstract: A semiconductor memory circuit reduces a current consumed by sense amplifiers, prevents erroneous operation, and can operate at high speed. The semiconductor memory circuit has a plurality of memory blocks each comprising a decoder, a plurality of memory cells, a plurality of sense amplifiers for amplifying potential changes in bit lines, a data latch for latching outputs from the sense amplifiers, a plurality of nMOS transistors for discharging the bit lines, an NAND gate for generating a sense amplifier de-energizing signal RD, and a reference voltage generator. In response to a memory block selecting signal CS, the NAND gate generates the sense amplifier de-energizing signal RD, which is applied to energize the nMOS transistors to discharge the bit lines of a memory block which is not selected.

Abstract: In a cache memory device including a DRAM cell array, a DRAM cell circuit is connected to word lines. A sense amplifier and a write amplifier are provided to the DRAM cell circuit for writing a certain data signal into one of memory cells connected to a selected word line. A read amplifier as well as the sense amplifier is provided to read data from one of the memory cells to generate a validity signal for showing whether data of the DRAM cell array is valid or invalid.

Abstract: Among power supply lines for the standard cells provided nearby the corner part of an outer peripheral power supply line (the grand potential, for example) of a macro cell, the power supply line of the power source potential, for example, is connected to an inner peripheral power supply line (the power source potential) through an auxiliary power supply line provided on said corner part. The auxiliary power supply line is formed in L-shape with the first metal layer line and the perpendicular extending second metal layer line connected each other through a contact. Further, the first metal layer line of the auxiliary power supply line is provided so as to cross over the second metal layer line of the outer peripheral power supply line with an insulating layer therebetween. Therefore, the auxiliary power supply line can connect the inner peripheral power supply line and the power source potential line for the standard cell without electrical contact with the outer peripheral power supply line.