Patents by Inventor Takashi Ishigami

Takashi Ishigami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030116849
    Abstract: A sputter target is made of a Ti—Al alloy containing Al in the range of 1 to 30 atm %. In the Ti—Al alloy constituting the sputter target, Al exists in at least one of a solid solution state in Ti and a state in which Al forms an intermetallic compound with Ti, and variation in Al content in the entire target is limited within 10%. Furthermore, an average crystal grain diameter of the Ti—Al alloy is 500 &mgr;m or less, and variation in crystal grain diameter in the entire target is limited within 30%. A Ti—Al—N film as a barrier film is formed by using the sputter target made of the Ti—Al alloy as described above. An electronic component includes a barrier film formed on a semiconductor substrate.
    Type: Application
    Filed: October 21, 2002
    Publication date: June 26, 2003
    Inventors: Yukinobu Suzuki, Takashi Ishigami, Yasuo Kohsaka, Naomi Fujioka, Takashi Watanabe, Koichi Watanabe, Kenya Sano
  • Patent number: 6400025
    Abstract: The crude Ti particles prepared by molten salt electrolysis or Iodide method are classified into each particle diameter according to contents of impurities, and the crude Ti particles having a desired particle diameter are selected from the crude Ti particles classified depending on each particle diameter. Otherwise, the crude Ti particles are acid-treated. Then they are electron-beam-melted. Through the above production process, there is prepared a highly purified Ti material having an oxygen content of not more than 350 ppm, Fe, Ni and Cr contents of not more than 15 ppm each, Na and K contents of not more than 0.5 ppm each, a reduction of area as a material characteristic of not less than 70%, and a thermal conductivity of not less than 16 W/m K. In short, the highly purified Ti material satisfying high purity, good processability and good thermal conductivity can be obtained.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: June 4, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Ishigami, Mituo Kawai, Noriaki Yagi
  • Patent number: 6372628
    Abstract: A structure and manufacturing process of a low dielectric constant interlayer insulating film used between wiring layers and semiconductor devices using such film are disclosed. The insulating film which can withstand in an actual process comprises an amorphous carbon fluoride film. A diamond like carbon film and a silicon excess layer are disposed on both sides of the amorphous carbon fluoride film to be inserted between the wiring layers, whereby adhesion to wiring and another insulating film contacting it is significantly enhanced. In addition, a silicon based insulating film is disposed and flattened on a multilayer film containing an amorphous carbon fluoride film buried with a wiring layer, and is used as a hard mask for anisotropically etching the diamond like carbon film and the amorphous carbon fluoride film with oxygen plasma to form a via hole.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: April 16, 2002
    Assignee: NEC Corporation
    Inventors: Yoshihisa Matsubara, Ko Noguchi, Shinya Ito, Noriaki Oda, Akira Matsumoto, Takashi Ishigami, Masahiko Nakamae, Tadahiko Horiuchi, Kazuhiko Endo, Toru Tatsumi, Yoshishige Matsumoto
  • Patent number: 6329275
    Abstract: An interconnector line of thin film comprising 0.001 to 30 at % of at least one kind of a first element capable of constituting an intermetallic compound of aluminum and/or having a higher standard electrode potential than aluminum, for example, at least one kind of the first element selected from Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Th, Sr, Ti, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Co, Ni, Pd, Ir, Pt, Cu, Ag, Au, Cd, Si, Pb and B; and one kind of a second element selected from C, O, N and H in a proportion of 0.01 at ppm to 50 at % of the first element, with the balance comprising substantially Al. In addition to having low resistance, such an Al interconnector line of thin film can prevent the occurrence of hillocks and the electrochemical reaction with an ITO electrode. The interconnector line of thin film can be obtained by sputtering in a dust-free manner by using a sputter target having a similar composition.
    Type: Grant
    Filed: April 10, 1998
    Date of Patent: December 11, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Ishigami, Koichi Watanabe, Akihisa Nitta, Toshihiro Maki, Noriaki Yagi
  • Patent number: 6241859
    Abstract: The present invention provides a method of forming a silicide layer on a silicon region. The method comprises the following steps. A first refractory metal layer is formed on the silicon region. The first refractory metal layer is made of a first refractory metal. A second refractory metal layer is formed on the first refractory metal layer. The second refractory metal layer is made of a second refractory metal and containing nitrogen. The second refractory metal layer has a film stress of not higher than 1×1010 dyne/cm2. A heat treatment is carried out in a first atmosphere substantially free of nitrogen so as to cause a silicidation of a lower region of the first refractory metal layer, whereby a C49-structured refractory metal silicide layer is formed on the silicon region.
    Type: Grant
    Filed: August 24, 1998
    Date of Patent: June 5, 2001
    Assignee: NEC Corporation
    Inventors: Yoshiaki Yamada, Yoshihisa Matsubara, Takashi Ishigami
  • Patent number: 6229241
    Abstract: A motor having a lap winding structure and a manufacturing method therefor, wherein inserts of two different coils are installed side by side in one slot of a stator in a circumferential direction of the stator. All the coils are inserted in slots in succession. Further, a stator having semi-closed type slots formed by protuberances oriented in different directions, is used to control a reduction in the magnetic flux at the inlet of a slot and also to prevent coils from coming off. In a motor having coils of a plurality of phases for generating a rotating magnetic field at a stator, the contact portion of the coil of the desired phase among the coils of the plurality of phases and a portion rising from a slot toward the axis of a core are aligned and disposed to have a shape which prevents them from interferring with end portions of the coils of other phases.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: May 8, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Ishigami, Yukinori Taneda, Toshihiko Sakai, Hiromichi Hiramatsu, Noriaki Yamamoto, Yuji Enomoto, Motoya Ito, Fumio Tajima, Suetaro Shibukawa, Masaharu Senoh, Osamu Koizumi
  • Patent number: 6222296
    Abstract: An electric motor, wherein a space factor of a coil in a stator or a rotor is enhanced, and which has a central part core comprising a plurality of laminated electromagnetic steel plates stamped out into a predetermined slot sectional shape and an end part core which is disposed on at least one end part toward a laminating direction of the central part core and a core shape of the end part core is different from the core shape of the central part core.
    Type: Grant
    Filed: April 15, 1998
    Date of Patent: April 24, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Toshihiko Sakai, Yukinori Taneda, Hiromichi Hiramatsu, Noriaki Yamamoto, Yuji Enomoto, Takashi Ishigami, Motoya Ito, Fumio Tajima, Masaharu Senoh, Suetaro Shibukawa
  • Patent number: 6210634
    Abstract: The crude Ti particles prepared by molten salt electrolysis or Iodide method are classified into each particle diameter according to contents of impurities, and the crude Ti particles having a desired particle diameter are selected from the crude Ti particles classified depending on each particle diameter. Otherwise, the crude Ti particles are acid-treated. Then they are electron-beam-melted. Through the above production process, there is prepared a highly purified Ti material having an oxygen content of not more than 350 ppm, Fe, Ni and Cr contents of not more than 15 ppm each, Na and K contents of not more than 0.5 ppm each, a reduction of area as a material characteristic of not less than 70%, and a thermal conductivity of not less than 16 W/m K. In short, the highly purified Ti material satisfying high purity, good processability and good thermal conductivity can be obtained.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: April 3, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Ishigami, Mituo Kawai, Noriaki Yagi
  • Patent number: 6165607
    Abstract: A sputtering target consisting essentially of Mn and at least one kind of R element selected from a group of Ni, Pd, Pt, Co, Rh, Ir, V, Nb, Ta, Cu, Ag, Au, Ru, Os, Cr, Mo, W, and Re. The sputtering target, at least as a part of target texture, comprises one member selected from a group of an alloy phase and a compound phase formed between the R element and Mn. In addition, oxygen content in the target is 1 weight % or less (including 0). With such a sputtering target, an anti-ferromagnetic material film consisting of RMn alloy excellent in corrosion resistivity and thermal performance can be stabilized in its film composition and film quality. By employing the anti-ferromagnetic material film, when an exchange coupling film is formed by stacking the anti-ferromagnetic material film and the ferromagnetic material film, sufficient exchange coupling force is obtained stably. Such an exchange coupling film can be used in a magneto-resistance effect element and the like.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: December 26, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Yamanobe, Naomi Fujioka, Takashi Ishigami, Nobuo Katsui, Hiromi Fuke, Kazuhiro Saito, Hitoshi Iwasaki, Masashi Sahashi, Takashi Watanabe
  • Patent number: 6127267
    Abstract: A fabrication method of a semiconductor device is provided, which makes it possible to form a thin and elongated refractory-metal silicide layer while preventing the overgrowth phenomenon. This method is comprised of the steps (a) to (c). In the step (a), a first refractory metal film is formed on a silicon region. In the step (b), a second refractory metal film is formed on the first refractory metal film. The second refractory metal film contains a same refractory metal as the first refractory metal film and nitrogen. A stress of the second refractory metal film is controlled to be a specific value or lower. In the step (c), the first refractory metal film and the second refractory metal film are heat-treated in an atmosphere excluding nitrogen, thereby forming a refractory-metal silicide layer at an interface between the silicon region and the first refractory metal film due to silicidation reaction of the first refractory metal film with the silicon region.
    Type: Grant
    Filed: October 9, 1998
    Date of Patent: October 3, 2000
    Assignee: NEC Corporation
    Inventors: Yoshihisa Matsubara, Takashi Ishigami, Yoshiaki Yamada, Shinichi Watanuki
  • Patent number: 6097094
    Abstract: There is provided a semiconductor device including a lower wiring layer including a first layer containing aluminum therein and a second layer formed on the first layer, the second layer having an extended portion extending beyond an outer surface of the first layer, an interlayer insulating layer formed covering the lower wiring layer therewith, the interlayer insulating layer being formed with a hole including a first portion terminating at an upper surface of the second layer and a second portion passing the second layer but not reaching a bottom of the first layer, an electrically conductive material filling the hole therewith, and an upper wiring layer formed on the interlayer insulating film in electrical connection with the lower wiring layer through the electrically conductive material. The first layer is not exposed to the second portion of the hole because of the interlayer insulating layer existing under the extended portion of the second layer.
    Type: Grant
    Filed: September 23, 1997
    Date of Patent: August 1, 2000
    Assignee: NEC Corporation
    Inventor: Takashi Ishigami
  • Patent number: 6091081
    Abstract: A structure and manufacturing process of a low dielectric constant interlayer insulating film used between wiring layers and semiconductor devices using such film are disclosed. The insulating film which can withstand in an actual process comprises an amorphous carbon fluoride film. A diamond like carbon film and a silicon excess layer are disposed on both sides of the amorphous carbon fluoride film to be inserted between the wiring layers, whereby adhesion to wiring and another insulating film contacting it is significantly enhanced. In addition, a silicon based insulating film is disposed and flattened on a multilayer film containing an amorphous carbon fluoride film buried with a wiring layer, and is used as a hard mask for anisotropically etching the diamond like carbon film and the amorphous carbon fluoride film with oxygen plasma to form a via hole.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: July 18, 2000
    Assignee: NEC Corporation
    Inventors: Yoshihisa Matsubara, Ko Noguchi, Shinya Ito, Noriaki Oda, Akira Matsumoto, Takashi Ishigami, Masahiko Nakamae, Tadahiko Horiuchi, Kazuhiko Endo, Toru Tatsumi, Yoshishige Matsumoto
  • Patent number: 6033536
    Abstract: A magnetron sputtering method using a sputtering target consisting of a material having a maximum relative magnetic permeability of 50 or more or consisting of a soft magnetic material which contains two or more phases selected from the group consisting of an M--X alloy phase, an M phase, and an X phase in that at least the simple substance phase consisting of an element having a smaller atomic weight of M and X is included, with the proviso that M.noteq.X, M is at least one element selected from the group consisting of Fe, Co and Ni, and X is at least one element selected from the group consisting of Fe, Al, Si, Ta, Zr, Nb, Hf and Ti.
    Type: Grant
    Filed: March 8, 1996
    Date of Patent: March 7, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsutaro Ichihara, Kohichi Tateyama, Ryo Sakai, Takashi Ishigami
  • Patent number: 5686980
    Abstract: A light-shielding film, and a liquid crystal display device including the light-shielding film, and a material suitable for forming the light-shielding film. The light-shielding film includes at least a film prepared from an inorganic insulating material and fine particles of metal and/or semi-metal dispersed in the insulating material film. The liquid crystal display device includes a display pixel electrode array substrate, a counter substrate, and a liquid crystal layer interposed between the two substrates. The light-shielding film is formed on the display pixel electrode array substrate of the liquid crystal display device.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: November 11, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Hirayama, Nobuki Ibaraki, Koji Hidaka, Kiyotsugu Mizouchi, Michiya Kobayashi, Takashi Ishigami, Ryo Sakai, Makoto Kikuchi
  • Patent number: 5679983
    Abstract: This is a highly purified metal comprising one metal selected from the group consisted of titanium, zirconium and hafnium. The highly purified metal has an Al content of not more than 10 ppm. It also has an oxygen content of more than 250 ppm, each of Fe, Ni and Cr contents not more than 10 ppm and each of Na and K contents not more than 0.1 ppm. The highly purified metal is obtained by either purifying crude metal by the iodide process or surface treating crude metal to remove a contaminated layer existing on the surface thereof and then melting The surface treated material with electron bean in a high vacuum.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: October 21, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Ishigami, Minoru Obata, Mituo Kawai, Michio Satou, Takashi Yamanobe, Toshihiro Maki, Noriaki Yagi, Shigeru Ando
  • Patent number: 5665647
    Abstract: A method of manufacturing a semiconductor device includes the steps of forming a silicon oxide film having a thickness of 5 nm or less on a silicon substrate or polysilicon film with a solution exhibiting an oxidation effect, forming a metal film on the silicon oxide film, and forming a silicide layer on the upper surface of the silicon substrate or polysilicon film by performing predetermined heat treatment.
    Type: Grant
    Filed: March 7, 1996
    Date of Patent: September 9, 1997
    Assignee: NEC Corporation
    Inventor: Takashi Ishigami
  • Patent number: 5593923
    Abstract: A method of producing a semiconductor device having a refractory metal silicide film includes the steps of implanting ions such as silicon into an active region such as drain/source region to form a damage portion therein, depositing a refractory metal on the damage portion, and annealing to form the refractory metal silicide layer. This silicide layer is formed by the refractory metal being reacted with silicon in the damage portion of the active region.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: January 14, 1997
    Assignee: NEC Corporation
    Inventors: Tadahiko Horiuchi, Takashi Ishigami, Hiroyuki Nakamura, Tohru Mogami, Hitoshi Wakabayashi, Takemitsu Kunio, Koichiro Okumura
  • Patent number: 5584906
    Abstract: The crude Ti particles prepared by molten salt electrolysis or Iodide method are classified into each particle diameter according to contents of impurities, and the crude Ti particles having a desired particle diameter are selected from the crude Ti particles classified depending on each particle diameter. Otherwise, the crude Ti particles are acid-treated. Then they are electron-beam-melted. Through the above production process, there is prepared a highly purified Ti material having an oxygen content of not more than 350 ppm, Fe, Ni and Cr contents of not more than 15 ppm each, Na and K contents of not more than 0.5 ppm each, a reduction of area as a material characteristic of not less than 70%, and a thermal conductivity of not less than 16 W/m K. In short, the highly purified Ti material satisfying high purity, good processability and good thermal conductivity can be obtained.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: December 17, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Ishigami, Mituo Kawai, Noriaki Yagi
  • Patent number: 5530467
    Abstract: A sputtering target comprises an oxide containing niobium, a silicide containing niobium and silicon oxide substantially for the rest. The sputtering target is formed e.g. by reactive sintering a powdery niobium or a powdery niobium alloy containing silicon oxide in the range of 15 to 70 mol % by mole ratio. A film resistor formed by using the sputtering target exhibits high specific resistance, good stabilities of resistance and a film composition and excellent reproducibility and is used as a heat generating resistor in e.g. a thermal printer head.
    Type: Grant
    Filed: June 19, 1991
    Date of Patent: June 25, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Ishigami, Mituo Kawai, Atsuko Iida
  • Patent number: 5470527
    Abstract: A sputtering target that consists essentially of a continuous matrix of Ti-W phase, Ti phase having a particle diameter of 50 .mu.m or less distributed in the matrix, and a W phase having a particle diameter of 20 .mu.m or less also distributed in the matrix. Preferably the target contains aluminum in the range of 1 ppm or less. The target has high density and a low impurity content, which reduces the generation of particles from the target when it is used for sputtering. A method of manufacturing the sputtering target is also disclosed.
    Type: Grant
    Filed: September 12, 1994
    Date of Patent: November 28, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Yamanobe, Michio Satou, Takashi Ishigami, Minoru Obata, Mituo Kawai, Noriaki Yagi, Toshihiro Maki, Shigeru Ando