Abstract: A transfer process in which, an original vector signal is precoded to an intermediately-precoded vector signal, and the extended modulo operation is performed when the intermediately-precoded vector signal is located outside a predetermined extended-modulo limit area, and the precoded vector signal is transferred through a system having a predetermined filtering characteristic. From the transferred vector signal, the original vector signal is detected, based on a relationship between the vector components of the original vector signal and the transferred vector signal.

Abstract: A transmission apparatus such as a modem has a receiving unit which receives information and a clock-supplying unit which supplies a clock signal to the receiving unit. It further has an instantaneous dropout detection unit which detects the occurrence of an instantaneous dropout on the receiving circuit and a clock supply control unit which stops the supply of a clock to the receiving unit for a prescribed amount of time when the instantaneous dropout detection unit detects an instantaneous dropout, the stopping of the clock supply causing holding of receiving parameters and the restarting of clock supply causing restarting of the receiving operation.

Abstract: The present invention discloses a timing phase control apparatus which is particularly suitable for use in a modem used for very high speed data transmission employing a metallic line. The timing phase control apparatus includes a timing phase extracting portion to extract timing phase information from an input signal, a timing phase control filter portion to make a timing phase control to the input signal depending upon the timing phase information from the timing phase extracting portion through filter processing using a coefficient operation having a preset impulse response characteristic, and a filter processing coefficient determining portion to determine a coefficient used for the filter processing in the timing phase control filter portion depending upon the timing phase information and information about an approximate expression of the impulse response characteristic.

Abstract: The position of an input signal in a two-dimensional plane is moved into the first quadrant, and based on the position of the signal point moved into the first quadrant, the origin of a signal point plane is shifted, and the signal for which the origin has been shifted is enlarged by a prescribed magnification factor for display on a display screen.

Abstract: The invention relates to an eye pattern which is generated upon transmission and also to a modulation and demodulation method which employs the eye pattern. The eye pattern and the modulation and demodulation method are improved in that, by devising the arrangement of signal points, the timing jitter amount is minimized and a frequency offset can be followed up accurately. The eye pattern to be generated upon transmission is constructed such that the arrangement of signal points thereof is not symmetrical with respect to the origin on a signal point arrangement plane on which the signal points are arranged.

Abstract: A method of controlling a line equalizer such as a modem includes an extracting step of extracting plural tone signals each superimposed on a transmission signal and having a specific frequency component; a judging step of judging levels of the extracted tone signals; and a controlling step of controlling characteristic of a line equalizer which equalizes a receive signal, based on the levels of the judged tone signals. A line equalizer is controlled without performing an exchange of a training signal prior to starting a data transmission and without increasing the amount of hardware of a modem or the like.

Abstract: A transmission apparatus, connected via a hybrid circuit to a line, such as a modulator-demodulator which can perform stable echo cancellation, whether the level of the far-end echo is high or not, provided with a transmission unit which generates a transmission signal to be transmitted to the line via the hybrid circuit, a reception unit which receives the reception signal supplied from the line via the hybrid circuit, and a superimposing means for superimposing the reception signal applied to the hybrid circuit onto the transmission signal. The transmission signal onto which the reception signal is superimposed by the superimposing means is transmitted to the line via the hybrid circuit.

Abstract: An apparatus for recovering a timing signal from a received signal in a transmission apparatus includes an equalizer equalizing a processed signal which is provided by processing the received signal with a first signal and adjusting tap coefficients so as to eliminate distortion in the processed signal. A tap-power distribution detector detects a distribution of the tap coefficients adjusted in the equalizer. A phase control part controls a phase of the first signal according to the distribution of the tap coefficients detected in the tap-power distribution detector. In the apparatus, the phase of the first signal is controlled so as to be synchronized with a timing signal component in the received signal.

Abstract: The invention provides a carrier phase control circuit which can eliminate a phase intercept fluctuation so that, when the carrier phase control circuit is applied to a very high speed modem having a communication speed of, for example, 28.8 kbps, occurrence of a communication error can be suppressed and the modem has an improved characteristic. The carrier phase control circuit is provided on a reception side of a communication apparatus and interposed between an automatic equalizer and a signal decision section. The carrier phase control circuit includes a frequency offset removal section for predicting and removing an offset of a frequency of a transmission signal based on an output of the automatic equalizer, and a phase intercept variation removal section for predicting and removing a phase intercept variation of the transmission signal based on an output of the frequency offset removal section and inputting a resulted signal as an output thereof to the signal decision section.

Abstract: A transfer process in which, an original vector signal is precoded to an intermediately-precoded vector signal, and the extended modulo operation is performed when the intermediately-precoded vector signal is located outside a predetermined extended-modulo limit area, and the precoded vector signal is transferred through a system having a predetermined filtering characteristic. From the transferred vector signal, the original vector signal is detected, based on a relationship between the vector components of the original vector signal and the transferred vector signal.

Abstract: The invention provides a phase jitter extraction circuit and a phase jitter cancellation circuit for use with a reception section of a communication apparatus such as a modem used to transmit data using a telephone line or a private line, which are improved in that noise of a signal is prevented from increasing to suppress phase jitters with a high degree of accuracy and high noise components can be suppressed irrespective of the power of the input signal.

Abstract: A transmission system includes a transmitter and a receiver and transmits a data signal with an analog passband signal through an analog transmission line. The data signal is transformed to a signal representing a descrete data signal point in a vector signal space. The transmitter includes a data signal point generation unit and a vector signal superimposing unit. The analog passband signal is transformed to a base band signal, and the base band signal is superimposed on the signal representing a descrete data signal point. A signal representing the superimposed data signal point is modulated and transmitted through the analog transmission line. The receiver includes a demodulator unit and a decision unit, wherein the data signal point is decided from the signal representing the superimposed data signal point, and the superimposed base band signal is extracted in a subtracter unit by subtracting the decided result from the signal representing the superimposed data signal point.

Abstract: A fixed equalizer and a fixed equalization method compensates for amplitude distortion, delay distortion, etc., of a signal transmitted over a transmission line. A processor unit carries out filtering process, such as amplitude equalization, delay equalization, line equalization, etc., in accordance with parameters read from a memory. In view of the fact that amplitude equalization process can be achieved by a combination of a highpass filter and a lowpass filter and line equalization process can be achieved by a filter having an attenuating characteristic which is negative at low frequencies and positive at high frequencies, the present invention stores parameters providing a characteristic corresponding to the synthesis of the characteristics of such filters in the memory and performs filtering computation on the basis of the parameters.

Abstract: The level of the input vector signal (X+jY) is reduced to (X+jY)/.sqroot.2 in the overflow preventing circuit. A power arithmetic operating circuit squares the level-down input vector signal, to obtain a power value (X.sup.2 +Y.sup.2)/2. The initial value of the tap value (K) which is finally set to a reciprocal number value is multiplied two times by a multiplying circuit, thereby obtaining K.sup.2 (X+Y).sup.2 /2. Further, a differential circuit obtains an error signal (.DELTA.K)=1/2-K.sup.2 (X.sup.2 +Y.sup.2)/2 with a reference. An updating circuit updates the tap value (K) so that the error signal (.DELTA.K) is equal to 0. A loop arithmetic operation of the multiplication of the tap value, differential arithmetic operation, and updating of the tap value is repeated until the error signal (.DELTA.K) is converged to a predetermined value or less. The tap value (K) when it was converged is obtained as a reciprocal number value 1/.sqroot.(X.sup.2 +Y.sup.2) of the amplitude of the input vector signal.

Abstract: In a modem, after scrambling data which are time-divided into main data and secondary data, a 2 W-4 W conversion circuit sends the data to the two-wire line. An estimated echo component is subtracted from a signal which is available from the 2 W-4 W conversion circuit. Following this, the signal from the 2 W-4 W conversion circuit is demodulated, descrambled and separated into main data and secondary data. A generator polynomial for scrambling is different from a generator polynomial for descrambling. The modem comprises a line-trouble-detect part which samples data of the secondary channel, by multipoint sampling, to obtain the secondary data and detects the number of inversion points in the descrambled secondary channel data per unit time period. The line-trouble-detect part outputs a line-trouble signal which indicates that there is a trouble on the line if the number of detected inversion points is more than a predetermined number.

Abstract: The invention provides a modulator and demodulator apparatus (modem) which modulates and demodulates a signal in a main channel, for main data, and a secondary channel, for secondary data obtained by frequency division, and which includes a carrier detection unit for detecting a carrier from a demodulation signal and executes a data processing sequence for the demodulation signal in accordance with a result of detection of the carrier detection unit. This apparatus improved in that it can detect a carrier of a low roll-off ratio accurately and stably without a dispersion in detection time and, consequently, data of a demodulation signal can be processed with certainty. The modulator and demodulator apparatus comprises a filter having a characteristic wherein the time axis response is slow and it is provided at a stage preceding the carrier detection unit so that a demodulation signal which has passed through the filter is input to the carrier detection unit.

Abstract: The invention provides an automatic equalizer which can keep, even where it is employed for a modem which has a very large number of taps, a high degree of accuracy in error correction of tap coefficients and can obtain an equalized signal with a high degree of accuracy. The automatic equalizer includes an equalization calculation section including a plurality of delaying sections, a tap coefficient multiplication section and a totaling calculation section, a tap coefficient error correction section for correcting errors of tap coefficients for the equalization calculation section based on an input to the automatic equalizer and an output of the automatic equalizer, and an input level setting section for setting an input signal level to the equalization calculation section and an input signal level to the tap coefficient error correction section to levels different from each other.

Abstract: An automatic equalizer which converges by a received signal and a data mode convergence method. A variance extracting unit extracts the variance of an output signal of a transversal automatic equalizing section and changes a predecision input signal to a proper level according to the extracted variance. A decision unit makes a decision for the predecision input signal which has been changed by the variance extracting unit and allocates the predecision input signal to a signal point. An amplitude error extracting unit extracts an amplitude error from a predecision input signal and a postdecision output signal of the decision unit and corrects the tap coefficients of the transversal automatic equalizing section according to the extracted amplitude error.

Abstract: A roll off filter portion for an input transmission point signal executes a roll-off filtering process and an interpolation process with a multiple of two at the same time. The roll-off filtering process is adapted to form a frequency spectrum characteristic in a cosine roll-off shape for the input signal. An interpolator portion, connected to the roll-off filter portion, executes an interpolation process with a multiple of two. This process is a filtering process for forming a frequency spectrum characteristic in a cosine roll-off shape for an input signal. Depending on what multiple of the original sampling frequency a transmission point signal is interpolated, a corresponding number of the interpolator portions are connected in a cascade shape.

Abstract: A modulator-demodulator device includes a transmitter side having an error control coding circuit for adding redundancy to a bit sequence to be transmitted from a bit processing circuit and coding the bit sequence. A data sequence to coordinate transforming circuit transforms the bit sequence from the error control circuit into a signal point coordinate on a complex plane. A coordinate rotating circuit rotates the transformed signal point coordinates based on frame phase information from a frame phase generating circuit. In the receiver side, a coordinate rotating circuit applies rotation in a direction reverse that of the transmitter coordinate rotating circuit based on the frame phase information from the frame phase generating circuit. A second decision circuit decides the maximum likelihood signal point by utilizing the redundancy added by the error control coding circuit of the transmitter side and correcting the coordinate error of the received signal point.