Patents by Inventor Takashi Maehata

Takashi Maehata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240171206
    Abstract: An onboard transmission system includes: a roof-side communication unit configured to receive RF (Radio Frequency) signals from a plurality of wireless machines respectively corresponding to a plurality of different frequency bands, and transmit a digital signal that is based on the received RF signals, to one transmission path, and a vehicle interior-side communication unit configured to process the digital signal received from the transmission path, in accordance with the respective frequency bands.
    Type: Application
    Filed: March 10, 2022
    Publication date: May 23, 2024
    Inventors: Chaoran LI, Takashi MAEHATA
  • Publication number: 20240154637
    Abstract: An onboard transmission system includes: a vehicle interior-side communication unit configured to generate a digital signal that includes a plurality of pieces of data respectively corresponding to a plurality of different frequency bands, and transmit the generated digital signal to one transmission path, and a roof-side communication unit configured to distribute the digital signal received from the transmission path or a signal that is based on the digital signal received from the transmission path, into signals for a plurality of wireless machines respectively corresponding to the plurality of frequency bands.
    Type: Application
    Filed: March 10, 2022
    Publication date: May 9, 2024
    Inventors: Chaoran LI, Takashi MAEHATA
  • Patent number: 10404267
    Abstract: Provided is a transmission system including: a signal processing apparatus 2 configured to transmit, via a signal cable 4, a delta-sigma modulated signal obtained by performing delta-sigma modulation on a transmission signal that is an RF signal; and a wireless apparatus 3 configured to transmit, via the signal cable 4, a reception signal that is an RF signal. The signal processing apparatus 2 transmits the delta-sigma modulated signal to the wireless apparatus 3, and the wireless apparatus 3 transmits the reception signal to the signal processing apparatus 2. In the delta-sigma modulated signal, quantization noise is suppressed at the frequency of the reception signal. The reception signal is transmitted to the signal processing apparatus 2 while the delta-sigma modulated signal is being transmitted to the wireless apparatus 3.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: September 3, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Maehata
  • Publication number: 20190173513
    Abstract: Provided is a transmission system including: a signal processing apparatus 2 configured to transmit, via a signal cable 4, a delta-sigma modulated signal obtained by performing delta-sigma modulation on a transmission signal that is an RF signal; and a wireless apparatus 3 configured to transmit, via the signal cable 4, a reception signal that is an RF signal. The signal processing apparatus 2 transmits the delta-sigma modulated signal to the wireless apparatus 3, and the wireless apparatus 3 transmits the reception signal to the signal processing apparatus 2. In the delta-sigma modulated signal, quantization noise is suppressed at the frequency of the reception signal. The reception signal is transmitted to the signal processing apparatus 2 while the delta-sigma modulated signal is being transmitted to the wireless apparatus 3.
    Type: Application
    Filed: April 5, 2017
    Publication date: June 6, 2019
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi MAEHATA
  • Patent number: 10177830
    Abstract: An array antenna system 3 includes: a transmission unit 14 to which a plurality of pulse signals are given, the pulse signals being obtained by pulse-modulation of digital transmission signals, and including analog transmission signals corresponding to the digital transmission signals, the transmission unit 14 being configured to transmit, as radio signals, the plurality of analog transmission signals included in the plurality of pulse signals; and a plurality of adjustment units 15 configured to perform, for the plurality of pulse signals to be given to the transmission unit 14, an adjustment process for adjusting the relationship of relative phases of the plurality of analog transmission signals included in the plurality of pulse signals.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: January 8, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Maehata
  • Patent number: 10090855
    Abstract: A delta-sigma modulator is provided with: a loop filter 30; a quantizer 36 that generates quantized data on the basis of an output from the loop filter 30; an internal path 42 connected to the loop filter 30 or the quantizer 36; and a compensator 38 that provides, to the internal path 42, a compensation signal for compensating for distortion that occurs in a frequency component at a target frequency, the frequency component being among frequency components of a pulse train corresponding to the quantized data.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: October 2, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Maehata
  • Publication number: 20180083686
    Abstract: An array antenna system 3 includes: a transmission unit 14 to which a plurality of pulse signals are given, the pulse signals being obtained by pulse-modulation of digital transmission signals, and including analog transmission signals corresponding to the digital transmission signals, the transmission unit 14 being configured to transmit, as radio signals, the plurality of analog transmission signals included in the plurality of pulse signals; and a plurality of adjustment units 15 configured to perform, for the plurality of pulse signals to be given to the transmission unit 14, an adjustment process for adjusting the relationship of relative phases of the plurality of analog transmission signals included in the plurality of pulse signals.
    Type: Application
    Filed: April 18, 2016
    Publication date: March 22, 2018
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi MAEHATA
  • Patent number: 9887704
    Abstract: A distortion compensator 10 acquires an asymmetric component included in a 1-bit pulse train outputted from a DSM 6 on the basis of an analog signal as an output signal obtained from the 1-bit pulse train, and an IQ signal as an input signal to be inputted to the DSM 6, and performs distortion compensation on the basis of the asymmetric component. The distortion compensator 10 is caused to store therein asymmetric component data representing the acquired asymmetric component. When acquiring the asymmetric component, the distortion compensator 10 acquires, as an asymmetric component, a difference between an output baseband signal obtained by orthogonally demodulating the analog signal as the output signal, and an input baseband signal before being orthogonally modulated.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: February 6, 2018
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Takashi Maehata
  • Publication number: 20170331490
    Abstract: A delta-sigma modulator is provided with: a loop filter 30; a quantizer 36 that generates quantized data on the basis of an output from the loop filter 30; an internal path 42 connected to the loop filter 30 or the quantizer 36; and a compensator 38 that provides, to the internal path 42, a compensation signal for compensating for distortion that occurs in a frequency component at a target frequency, the frequency component being among frequency components of a pulse train corresponding to the quantized data.
    Type: Application
    Filed: November 17, 2015
    Publication date: November 16, 2017
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi MAEHATA
  • Patent number: 9698816
    Abstract: Reduction in signal intensity of a harmonic component included in an output of a delta-sigma modulator is suppressed. A signal processing device includes: a delta-sigma modulator 11 that outputs a pulse signal; a first processor 12 that generates, from the pulse signal PO outputted from the delta-sigma modulator 11, a discontinuous pulse signal PC in which each of one-pulse sections in the pulse signal PO has a low level region on at least one of a rear end and a front end of the one-pulse section; and a second processor that generates a short-width pulse signal PS having a pulse width shorter than a pulse width of the discontinuous pulse signal PC generated by the first processor 12.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: July 4, 2017
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Maehata
  • Publication number: 20170063391
    Abstract: A distortion compensator 10 acquires an asymmetric component included in a 1-bit pulse train outputted from a DSM 6 on the basis of an analog signal as an output signal obtained from the 1-bit pulse train, and an IQ signal as an input signal to be inputted to the DSM 6, and performs distortion compensation on the basis of the asymmetric component. The distortion compensator 10 is caused to store therein asymmetric component data representing the acquired asymmetric component. When acquiring the asymmetric component, the distortion compensator 10 acquires, as an asymmetric component, a difference between an output baseband signal obtained by orthogonally demodulating the analog signal as the output signal, and an input baseband signal before being orthogonally modulated.
    Type: Application
    Filed: February 26, 2015
    Publication date: March 2, 2017
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi MAEHATA
  • Publication number: 20170047942
    Abstract: Reduction in signal intensity of a harmonic component included in an output of a delta-sigma modulator is suppressed. A signal processing device includes: a delta-sigma modulator 11 that outputs a pulse signal; a first processor 12 that generates, from the pulse signal PO outputted from the delta-sigma modulator 11, a discontinuous pulse signal PC in which each of one-pulse sections in the pulse signal PO has a low level region on at least one of a rear end and a front end of the one-pulse section; and a second processor that generates a short-width pulse signal PS having a pulse width shorter than a pulse width of the discontinuous pulse signal PC generated by the first processor 12.
    Type: Application
    Filed: January 28, 2015
    Publication date: February 16, 2017
    Inventor: Takashi MAEHATA
  • Patent number: 9515674
    Abstract: A signal conversion method including converting an input signal into a 1-bit pulse train representing an analog signal is provided. The 1-bit pulse train has a pulse rising waveform frise and a pulse falling waveform ffall. The pulse rising waveform frise includes a first distortion component with respect to an ideal pulse rising waveform, and the pulse falling waveform ffall includes a second distortion component with respect to an ideal pulse falling waveform. The first distortion component and the second distortion component are substantially line-symmetric with respect to a time axis.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: December 6, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Maehata
  • Publication number: 20160142075
    Abstract: A decoder 5 applies decode processing to N input data in parallel to generate K decode data. An S/P converter 6 outputs N input data applied in series to decoder 5 through first lines L1-L64 dividedly over several times. A P/S converter 7 receives through second lines R1-R60 the K decode data from decoder 5 dividedly over several times to output in series the K decoded data to an external source.
    Type: Application
    Filed: November 12, 2015
    Publication date: May 19, 2016
    Inventor: Takashi MAEHATA
  • Patent number: 9344110
    Abstract: A delta-sigma modulator capable of outputting an output signal including a plurality of signals having different frequencies. The delta-sigma modulator includes: a plurality of input ports to which a plurality of input signals having different frequencies are inputted, respectively; a plurality of loop filters provided corresponding to the plurality of input ports, respectively; an adder configured to add outputs of the plurality of loop filters; and a quantizer configured to quantize an output of the adder. The plurality of loop filters each receive the input signal inputted to the corresponding input port and a feedback signal of an output of the quantizer. The plurality of loop filters each have a characteristic of stopping noise in the vicinity of a frequency of the input signal inputted to the corresponding input port.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: May 17, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Maehata
  • Publication number: 20160118997
    Abstract: A signal conversion method including converting an input signal into a 1-bit pulse train representing an analog signal is provided. The 1-bit pulse train has a pulse rising waveform frise and a pulse falling waveform ffall. The pulse rising waveform frise includes a first distortion component with respect to an ideal pulse rising waveform, and the pulse falling waveform ffall includes a second distortion component with respect to an ideal pulse falling waveform. The first distortion component and the second distortion component are substantially line-symmetric with respect to a time axis.
    Type: Application
    Filed: September 9, 2015
    Publication date: April 28, 2016
    Inventor: Takashi MAEHATA
  • Patent number: 9264063
    Abstract: To obtain a band pass delta sigma modulator (excluding ?0?±(?/2)×n; n is an integer being 1 or greater) for a desired frequency by replacing z in a z domain model of a low pass delta-sigma modulator with z? below: z?=fcnv(z,?0), wherein fcnv(z, ?0) is a function in which the absolute value of fcnv(z, ?0) is always 1 for any z and ?0, ?0=2?×(f0/fs), fs is a sampling frequency, and f0 is a center frequency of a quantization noise stop band of the band pass delta-sigma modulator.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: February 16, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Maehata
  • Publication number: 20160013805
    Abstract: A delta-sigma modulator capable of outputting an output signal including a plurality of signals having different frequencies. The delta-sigma modulator includes: a plurality of input ports to which a plurality of input signals having different frequencies are inputted, respectively; a plurality of loop filters provided corresponding to the plurality of input ports, respectively; an adder configured to add outputs of the plurality of loop filters; and a quantizer configured to quantize an output of the adder. The plurality of loop filters each receive the input signal inputted to the corresponding input port and a feedback signal of an output of the quantizer. The plurality of loop filters each have a characteristic of stopping noise in the vicinity of a frequency of the input signal inputted to the corresponding input port.
    Type: Application
    Filed: February 27, 2014
    Publication date: January 14, 2016
    Inventor: Takashi MAEHATA
  • Patent number: 9203433
    Abstract: A decoder 5 applies decode processing to N input data in parallel to generate K decode data. An S/P converter 6 outputs N input data applied in series to decoder 5 through first lines L1-L64 dividedly over several times. A P/S converter 7 receives through second lines R1-R60 the K decode data from decoder 5 dividedly over several times to output in series the K decoded data to an external source.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: December 1, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Maehata
  • Patent number: 9166616
    Abstract: A signal conversion method including converting an input signal into a 1-bit pulse train representing an analog signal is provided. The 1-bit pulse train has a pulse rising waveform frise and a pulse falling waveform ffall. The pulse rising waveform frise includes a first distortion component with respect to an ideal pulse rising waveform, and the pulse falling waveform ffall includes a second distortion component with respect to an ideal pulse falling waveform. The first distortion component and the second distortion component are substantially line-symmetric with respect to a time axis.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: October 20, 2015
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Maehata