Patents by Inventor Takashi Morigami

Takashi Morigami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7859268
    Abstract: A test signal is supplied to a test switch provided between a D/A converter for selecting and outputting a gray scale voltage of the driving circuit and an amplifier for amplifying and supplying an output voltage at the D/A converter to set a test mode, and an output voltage of the D/A converter is directly measured by a measuring device through the test switch to measure an ON resistance of a gray scale voltage selection circuit of the D/A converter.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: December 28, 2010
    Assignee: Renesas Electronics Corporation
    Inventors: Noboru Okuzono, Takashi Morigami, Tsukasa Yasuda
  • Publication number: 20080100603
    Abstract: An output circuit of a data driver in a liquid crystal display apparatus conducts a dot inversion driving method. The output circuit includes amplifiers that output the data signals on data lines, switches that separate the data lines from the amplifiers and short/precharge circuit that shorts the lines between the data lines, for a predetermined time, and then supply the same polarity precharge voltage as the polarity when writing the data signals on the data lines in a next sequence.
    Type: Application
    Filed: October 22, 2007
    Publication date: May 1, 2008
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Satoru Matsuda, Takashi Morigami
  • Publication number: 20070067693
    Abstract: A test signal is supplied to a test switch provided between a D/A converter for selecting and outputting a gray scale voltage of the driving circuit and an amplifier for amplifying and supplying an output voltage at the D/A converter to set a test mode, and an output voltage of the D/A converter is directly measured by a measuring device through the test switch to measure an ON resistance of a gray scale voltage selection circuit of the D/A converter.
    Type: Application
    Filed: August 30, 2006
    Publication date: March 22, 2007
    Inventors: Noboru Okuzono, Takashi Morigami, Tsukasa Yasuda
  • Patent number: 5070295
    Abstract: A power-on reset circuit has first and second reference potential circuits and a comparator. The first and second reference potential circuits are such that their output voltage curves with respect to the power supply voltages intersect at a predetermined power supply voltage. The comparator compares output voltages of the first and second reference potential circuits. The first reference potential circuit has a first and a second resistor connected in series and a first non-linear resistor element circuit all connected between a first and a second power supply terminal. A node between the first and second resistors forms an output terminal of the first reference potential circuit. The second reference potential circuit has a third, fourth and fifth resistors connected in series between the first and second power supply terminals and a second non-linear resistor element circuit connected in parallel to the fourth resistor.
    Type: Grant
    Filed: April 18, 1991
    Date of Patent: December 3, 1991
    Assignee: NEC Corporation
    Inventor: Takashi Morigami
  • Patent number: 4999567
    Abstract: First and second MOS transistors are connected through a first resistance to each other in series between first and second potentials. Third and fourth MOS transistors are connected in series between the first and second potentials. Gates of the first and third MOS transistors are commonly connected to each other, and connected to a drain of the third MOS transistor. A diode, a Zener diode, and a second resistance are connected in series between the first and second potentials, such that cathodes of the diode and the Zener diode are connected to each other. A constant voltage generated at a connecting point between the second resistance and the serial connection of the diode and the Zener diode is applied to a gate of the fourth MOS transistor. A constant current circuit thus obtained operates with a low voltage and is adapted to be connected even to a comparator having a large dependency on the threshold voltages.
    Type: Grant
    Filed: December 20, 1989
    Date of Patent: March 12, 1991
    Assignee: NEC Corporation
    Inventor: Takashi Morigami