Patents by Inventor Takashi Tsuno

Takashi Tsuno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240152151
    Abstract: A mobile charging apparatus is provided. The apparatus comprises a battery for charging a work machine; a movement unit that causes the mobile charging apparatus to autonomously move; and a controller that executes a program to perform control such that the movement unit moves the mobile charging apparatus to a predetermined position to wait for the work machine.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 9, 2024
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Takashi Hashizume, Ryuichi Kimata, Keiichiro Bungo, Koichi Tsuno
  • Publication number: 20240111286
    Abstract: An autonomous control system and method for a vessel are provided. The autonomous control system includes a route setting unit, setting a route to a destination; a disturbance data acquisition unit, acquiring disturbance data from sources other than the vessel; an autonomous control unit, performing a control of the vessel based on the route set by the route setting unit and corrects the control of the vessel based on the disturbance data acquired by the disturbance data acquisition unit.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: Honda Motor Co., Ltd.
    Inventors: Takashi HASHIZUME, Ryuichi KIMATA, Ryota HISADA, Koichi TSUNO
  • Publication number: 20240111287
    Abstract: An automatic berthing system and method for a vessel are provided. The automatic berthing system comprises a controller, controlling the vessel; an input part, receiving an input to perform the automatic berthing mode; at least one peripheral sensor, detecting position information and speed information of another vessel other than the vessel to determine whether a wake caused by the another vessel has influence on the vessel. The controller performs an automatic berthing control when the input to perform the automatic berthing mode is received until the vessel reaches a berthing position, and the controller stops the automatic berthing control when the another vessel is located within a predetermined distance from the vessel based on the position information.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: Honda Motor Co., Ltd.
    Inventors: Takashi HASHIZUME, Ryuichi KIMATA, Ryota HISADA, Koichi TSUNO
  • Publication number: 20230037158
    Abstract: A semiconductor module includes a base member; a circuit board provided on the base member and including a positive electrode pad, a negative electrode pad, and semiconductor devices; a housing formed in a frame shape and attached to the base member; a first electrode plate electrically coupled to the positive electrode pad and having a first flat plate portion; a second electrode plate electrically coupled to the negative electrode pad and having a second flat plate portion; and a first insulating member. The first flat plate portion and the second flat plate portion are disposed in parallel from the inside to outside of the housing. The first flat plate portion has a first external connection terminal situated outside the housing, and the second flat plate portion has a second external connection terminal situated outside the housing. The first insulating member is sandwiched between the first and the second external connection terminals.
    Type: Application
    Filed: January 16, 2020
    Publication date: February 2, 2023
    Inventors: Christina LEGEN, Gerhard WOELFL, Hirotaka OOMORI, Masaki TANIYAMA, Satoshi HATSUKAWA, Takashi TSUNO
  • Patent number: 11495527
    Abstract: A semiconductor module includes a base member including a circuit board on which a positive electrode pad and a negative electrode pad are provided and on which a semiconductor device is mounted to be electrically coupled to the positive electrode pad and the negative electrode pad, a housing that is attached to the base member so as to surround the positive electrode pad and the negative electrode pad, the housing being formed in a frame shape, a first electrode plate that is electrically coupled to the positive electrode pad, the first electrode plate having a flat plate portion, and a second electrode plate that is electrically coupled to the negative electrode pad, the second electrode plate having a flat plate portion. The flat plate portion of the first electrode plate and the flat plate portion of the second electrode plate are arranged in a parallel-plate configuration within the housing.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: November 8, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hirotaka Oomori, Satoshi Hatsukawa, Takashi Tsuno
  • Patent number: 11282925
    Abstract: A silicon carbide semiconductor device has a gate insulating film, a first gate electrode, a first electrode, a second electrode, and a gate runner. A silicon carbide substrate has a first main surface and a second main surface. The silicon carbide substrate includes a first impurity region, a second impurity region, and a third impurity region. The first main surface is provided with a gate electrode trench and a gate runner trench. The gate electrode trench is defined by a side surface and a bottom surface continuous to the side surface. The gate insulating film is in contact with both the side surface and the bottom surface. The first gate electrode is provided on the gate insulating film. The second gate electrode is provided in the gate runner trench, and is electrically connected to the first gate electrode. The gate runner is provided on the second gate electrode.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: March 22, 2022
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Toru Hiyoshi, Takashi Tsuno
  • Patent number: 11268883
    Abstract: Provided are: a past relation identification unit that combines past sensor data with job data based on information on an item relating to data combination, and identifies a data relation between items based on an item of the past sensor data and an item of the job data; a real-time relation identification unit that identifies a data relation between items of real-time sensor data; a similarity calculation unit that calculates a similarity between the data relation identified by the past relation identification unit and the data relation identified by the real-time relation identification unit; and an output controller that outputs the data relation identified by the past relation identification unit and the data relation identified by the real-time relation identification unit while associating with each other by the item of the past sensor data and the item of the real-time sensor data, the similarity between those data relations exceeding a threshold, the similarity being calculated by the similarity calcu
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: March 8, 2022
    Assignee: HITACHI, LTD.
    Inventors: Kenji Kawasaki, Hidenori Yamamoto, Takeshi Handa, Takashi Tsuno
  • Patent number: 11201130
    Abstract: A semiconductor device includes a base plate; a metal plate above the base plate; a bonding material between the base plate and metal plate, bonding the metal plate to the base plate; an insulating plate on the metal plate; a circuit member on the insulating plate; a semiconductor element mounted on the circuit member; and a sealing material to seal a space on the base plate. The metal plate includes a bottom surface area along a periphery, exposed from the bonding material. The base plate includes a groove-shaped first recess formed along the periphery of the metal plate and faces the bottom surface area. The base plate also includes a groove-shaped second recess that is spaced apart from the first recess and that is formed on the inner side relative to the first recess. The bonding material is disposed in at least a part of the second recess.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: December 14, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hirotaka Oomori, Takashi Tsuno
  • Patent number: 11188567
    Abstract: A data analysis support apparatus includes a relationship network generation section that analyzes a relationship between operating systems, a relationship between operation data tables, a relationship between data items possessed by the operation data tables and a relationship between data values possessed by records of the operation data tables and stores them, as a relationship network; a data item classification section that classifies data items that become a data analysis target into a first data type based on an actual value and a second data type based on a planned value; an analysis data table generation section that generates and accumulates an analysis data table to be used for data analysis; a data model generation section that generates, as a data model, a data item group that allows data analysis in combination; and an analysis target item presentation section that recommends a data item to be made an analysis target.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: November 30, 2021
    Assignee: Hitachi, Ltd.
    Inventors: Yuko Yamashita, Tsuyoshi Minakawa, Tomoe Tomiyama, Kenji Kawasaki, Hidenori Yamamoto, Takeshi Handa, Takashi Tsuno, Hiroyuki Hirata
  • Publication number: 20210320055
    Abstract: A semiconductor module includes a base member including a circuit board on which a positive electrode pad and a negative electrode pad are provided and on which a semiconductor device is mounted to be electrically coupled to the positive electrode pad and the negative electrode pad, a housing that is attached to the base member so as to surround the positive electrode pad and the negative electrode pad, the housing being formed in a frame shape, a first electrode plate that is electrically coupled to the positive electrode pad, the first electrode plate having a flat plate portion, and a second electrode plate that is electrically coupled to the negative electrode pad, the second electrode plate having a flat plate portion. The flat plate portion of the first electrode plate and the flat plate portion of the second electrode plate are arranged in a parallel-plate configuration within the housing.
    Type: Application
    Filed: August 16, 2018
    Publication date: October 14, 2021
    Inventors: Hirotaka OOMORI, Satoshi HATSUKAWA, Takashi TSUNO
  • Publication number: 20210302276
    Abstract: Provided are: a past relation identification unit that combines past sensor data with job data based on information on an item relating to data combination, and identifies a data relation between items based on an item of the past sensor data and an item of the job data; a real-time relation identification unit that identifies a data relation between items of real-time sensor data; a similarity calculation unit that calculates a similarity between the data relation identified by the past relation identification unit and the data relation identified by the real-time relation identification unit; and an output controller that outputs the data relation identified by the past relation identification unit and the data relation identified by the real-time relation identification unit while associating with each other by the item of the past sensor data and the item of the real-time sensor data, the similarity between those data relations exceeding a threshold, the similarity being calculated by the similarity calcu
    Type: Application
    Filed: March 13, 2019
    Publication date: September 30, 2021
    Inventors: Kenji KAWASAKI, Hidenori YAMAMOTO, Takeshi HANDA, Takashi TSUNO
  • Patent number: 11056456
    Abstract: A semiconductor apparatus includes a base plate, a metal plate disposed on the base plate, a bonding material disposed between the base plate and the metal plate to be in surface-to-surface contact with the base plate and the metal plate to bond the metal plate to the base plate, an insulating plate disposed on the metal plate, a circuit member disposed on the insulating plate to be in surface-to-surface contact with the insulating plate, a semiconductor device mounted on the circuit member, and an encapsulating material covering the metal plate, the bonding material, the insulating plate, the circuit member, and the semiconductor device to encapsulate an area over the base plate, wherein a bottom face area of the metal plate along the outer perimeter of the metal plate is not covered with the bonding material, wherein the base plate has a groove-shape recess that is disposed along the outer perimeter of the metal plate to face the bottom surface area, wherein the recess has an area having a first depth and a
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: July 6, 2021
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hirotaka Oomori, Takashi Tsuno
  • Patent number: 11016758
    Abstract: Proposal of data analysis components is enabled to be performed irrespective of the quantity of an implementation history of data analysis, and thus efficiency and cost reduction of production of software for data analysis are promoted. A data utilization platform server 101 is configured to includes a arithmetic device 112 which executes processing of generating analysis relationship information prescribing linkage between analysis target data and an analysis component executing analysis processing for the analysis target table on the basis of a relationship among a plurality pieces of the analysis target data collected from a plurality of predetermined systems; and processing of specifying a combination of a plurality of the analysis components available for predetermined data designated as an analysis target by a user on the basis of the analysis relationship information.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 25, 2021
    Assignee: HITACHI, LTD.
    Inventors: Hidenori Yamamoto, Takeshi Handa, Yuko Yamashita, Kenji Kawasaki, Syuuichirou Sakikawa, Takashi Tsuno
  • Publication number: 20210117886
    Abstract: To make a proposal of appropriate data preparation contents for a utilization purpose to a user making utilization of data, and to cause a system providing functions related to data accumulation, data preparation, and data utilization to have high importance level data preparation contents to be prepared for various purposes of various users, in such a manner as to enable facilitating the data utilization for various purposes using diverse data from a plurality of business systems, the system collates a utilization purpose designated by a user with data information prepared by the system, and calculates and presents data preparation content items to be carried out for the utilization purpose and a difficulty level of each item. The system aggregates the data preparation content items for the utilization purpose, categorizes similar data preparation contents, and calculates and presents an importance level of a category.
    Type: Application
    Filed: February 20, 2019
    Publication date: April 22, 2021
    Inventors: Hidenori YAMAMOTO, Kenji KAWASAKI, Takeshi HANDA, Takashi TSUNO
  • Publication number: 20210066236
    Abstract: A semiconductor apparatus includes a base plate, a metal plate disposed on the base plate, a bonding material disposed between the base plate and the metal plate to be in surface-to-surface contact with the base plate and the metal plate to bond the metal plate to the base plate, an insulating plate disposed on the metal plate, a circuit member disposed on the insulating plate to be in surface-to-surface contact with the insulating plate, a semiconductor device mounted on the circuit member, and an encapsulating material covering the metal plate, the bonding material, the insulating plate, the circuit member, and the semiconductor device to encapsulate an area over the base plate, wherein a bottom face area of the metal plate along the outer perimeter of the metal plate is not covered with the bonding material, wherein the base plate has a groove-shape recess that is disposed along the outer perimeter of the metal plate to face the bottom surface area, wherein the recess has an area having a first depth and a
    Type: Application
    Filed: December 3, 2018
    Publication date: March 4, 2021
    Inventors: Hirotaka OOMORI, Takashi TSUNO
  • Publication number: 20210066235
    Abstract: A semiconductor device includes a base plate; a metal plate disposed above the base plate; a bonding material disposed between the base plate and the metal plate and in surface contact with the base plate and the metal plate so as to bond the metal plate to the base plate; an insulating plate disposed on the metal plate; a circuit member disposed on the insulating plate and in surface contact with the insulating plate; a semiconductor element mounted on the circuit member; and a sealing material that covers the metal plate, the bonding material, the insulating plate, the circuit member, and the semiconductor element to seal a space on the base plate. The metal plate includes a bottom surface area that is located along an outer periphery of the metal plate and that is not covered by the bonding material. The base plate includes a groove-shaped first recess that is formed along the outer periphery of the metal plate and that faces the bottom surface area.
    Type: Application
    Filed: December 3, 2018
    Publication date: March 4, 2021
    Inventors: Hirotaka OOMORI, Takashi TSUNO
  • Publication number: 20200373392
    Abstract: A silicon carbide semiconductor device has a gate insulating film, a first gate electrode, a first electrode, a second electrode, and a gate runner. A silicon carbide substrate has a first main surface and a second main surface. The silicon carbide substrate includes a first impurity region, a second impurity region, and a third impurity region. The first main surface is provided with a gate electrode trench and a gate runner trench. The gate electrode trench is defined by a side surface and a bottom surface continuous to the side surface. The gate insulating film is in contact with both the side surface and the bottom surface. The first gate electrode is provided on the gate insulating film. The second gate electrode is provided in the gate runner trench, and is electrically connected to the first gate electrode. The gate runner is provided on the second gate electrode.
    Type: Application
    Filed: October 2, 2018
    Publication date: November 26, 2020
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Toru HIYOSHI, Takashi TSUNO
  • Publication number: 20200193343
    Abstract: To support realization of efficient data conversion processing even between data with undefined conversion definition and the like.
    Type: Application
    Filed: March 21, 2017
    Publication date: June 18, 2020
    Inventors: Takeshi HANDA, Yuko YAMASHITA, Hidenori YAMAMOTO, Kenji KAWASAKI, Syuuichirou SAKIKAWA, Takashi TSUNO
  • Publication number: 20200111727
    Abstract: A packaged semiconductor device includes a substrate including a die pad and a drain terminal extending from the die pad in one direction in a plan view, a gate terminal and a source terminal extending in the one direction on both sides of the drain terminal. A semiconductor chip has a rectangular shape and is disposed on the die pad such that short sides are parallel to the drain terminal and a center of gravity is closer to the source terminal than the gate terminal. A gate pad is disposed on the gate terminal side on an upper surface of the semiconductor chip. A plurality of source pads is arrayed from the source terminal side toward the gate terminal side on the upper surface of the semiconductor chip. A gate wire connects the gate pad to the gate terminal, and a plurality of source wires connects the plurality of source pads to the source terminal.
    Type: Application
    Filed: November 2, 2017
    Publication date: April 9, 2020
    Inventor: Takashi TSUNO
  • Publication number: 20190319102
    Abstract: A semiconductor device includes: a silicon carbide epitaxial layer formed on one main surface of a single-crystal silicon carbide substrate; a recessed portion and a protruding portion formed on a surface of the silicon carbide epitaxial layer; an inclined surface formed between the recessed portion and the protruding portion; a first contact area of first conductivity type formed on the inclined surface side of the bottom surface of the recessed portion; a second contact area of second conductivity type in contact with the first contact area; a drift area of first conductivity type formed on an upper surface of the protruding portion; a body area of second conductivity type formed on the inclined surface between the first contact area and the drift area; a gate insulating film that covers the inclined surface; a gate electrode; a source electrode; and a drain electrode, wherein an angle of the inclined surface with respect to the one main surface of the single-crystal silicon carbide substrate is 40° or more
    Type: Application
    Filed: June 29, 2017
    Publication date: October 17, 2019
    Inventor: Takashi TSUNO