Patents by Inventor Takashi Yamauchi

Takashi Yamauchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220240404
    Abstract: An electronic apparatus includes a chassis and a substrate arranged to face each other, a cable disposed between the chassis and the substrate and having an extra length, and a plurality of clampers formed on the chassis and clamping the cable. The plurality of dampers includes a second damper fixedly clamping the cable and a third clamper movably clamping the cable. The cable is fixed to the chassis by the second damper, and the third damper limits a movable direction and a movable range of the cable in extra length processing of the cable.
    Type: Application
    Filed: July 4, 2019
    Publication date: July 28, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventor: Takashi YAMAUCHI
  • Publication number: 20220100959
    Abstract: A topic analysis portion extracts a word or a phrase of a prescribed topic from utterance text representing utterance content. A search portion searches for reference text related to the topic in a storage portion in which an utterance history including previous utterance text is saved. A display processing portion outputs the utterance text and related information about the reference text in association with each other to a display portion.
    Type: Application
    Filed: September 22, 2021
    Publication date: March 31, 2022
    Inventors: Kazuhiro Nakadai, Naoaki Sumida, Masaki Nakatsuka, Yuichi Yoshida, Takashi Yamauchi, Kazuya Maura, Kyosuke Hineno, Syozo Yokoo
  • Publication number: 20220101852
    Abstract: A speech recognition portion generates utterance text representing utterance content by performing a speech recognition process on speech data. A topic analysis portion identifies a word or a phrase of a prescribed topic and a numerical value having a prescribed positional relationship with the word or the phrase from the utterance text. A display processing portion causes a display portion to display display information in which the numerical value or a numerical value derived from the numerical value is shown as a display value in association with the utterance text.
    Type: Application
    Filed: September 20, 2021
    Publication date: March 31, 2022
    Inventors: Kazuhiro Nakadai, Naoaki Sumida, Masaki Nakatsuka, Yuichi Yoshida, Takashi Yamauchi, Kazuya Maura, Kyosuke Hineno, Syozo Yokoo
  • Patent number: 11160164
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the core layer such that each via conductor decreases in diameter from one of the inner conductor layers toward the other one of the inner conductor layers and that the other one of the inner conductor layers has thickness greater than thickness of the one of the inner conductor layers. The first and/or second inner conductor layers includes a first laminated structure including metal foil and plating film layers, the first and/or second outer conductor layers includes the first laminated structure, and the first and/or second intermediate conductor layers includes a second laminated structure including metal foil and plating film layers.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: October 26, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Publication number: 20210304755
    Abstract: A voice recognition part performs voice recognition on a voice data and generates an utterance text which is a text indicating an utterance content. A display processing part moves a position of a display text displayed on a display part, displays the utterance text as a display text in a free region generated by the movement, and fixes the display text in a section of which fixing of a display position is instructed according to an operation as a fixed text at a predetermined display position to display on the display part.
    Type: Application
    Filed: March 29, 2021
    Publication date: September 30, 2021
    Applicant: Honda Motor Co., Ltd.
    Inventors: Naoaki SUMIDA, Masaki NAKATSUKA, Kazuhiro NAKADAI, Yuichi YOSHIDA, Takashi YAMAUCHI, Kazuya Maura, Kyosuke Hineno, Syozo Yokoo
  • Publication number: 20210303787
    Abstract: A voice recognition part performs voice recognition on a voice data and generates a first text which is a text indicating an utterance content. A text acquisition part acquires a second text which is a text indicating an utterance content according to an operation. A display processing part moves a position of a display text displayed on a display part, displays a text of at least one of the first text and the second text as a display text in a free region generated by the movement, and when fixing of a display position of the second text is instructed according to an operation, fixes the second text as a fixed text at a predetermined display position and displays the second text on the display part.
    Type: Application
    Filed: March 29, 2021
    Publication date: September 30, 2021
    Applicant: Honda Motor Co., Ltd.
    Inventors: Naoaki SUMIDA, Masaki NAKATSUKA, Kazuhiro NAKADAI, Yuichi YOSHIDA, Takashi YAMAUCHI, Kazuya Maura, Kyosuke Hineno, Syozo Yokoo
  • Publication number: 20210304767
    Abstract: Provided are a meeting support system, a meeting support method, and a program. The meeting support system includes a meeting support device used by a first participant and a terminal used by a second participant. The meeting support device includes an acquisition unit acquiring utterance information of the first participant, a display unit displaying at least the utterance information of the first participant, and a processing unit determining whether an utterance of the first participant is interrupted when acquiring a wait request from the terminal and changing display of the display unit according to the wait request when it is determined that the utterance of the first participant is interrupted.
    Type: Application
    Filed: March 29, 2021
    Publication date: September 30, 2021
    Applicant: Honda Motor Co., Ltd.
    Inventors: Naoaki SUMIDA, Masaki NAKATSUKA, Kazuhiro NAKADAI, Yuichi YOSHIDA, Takashi YAMAUCHI, Kazuya Maura, Kyosuke Hineno, Syozo Yokoo
  • Patent number: 11116080
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate layers, second conductor layers including second inner, outer and intermediate layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the insulating layers such that each via conductor connects two conductor layers and is integrally formed with one of the conductor layers on side away from the core layer. The first and/or second inner conductor layers has a first conductor layer structure including metal foil and plating film layers, the first and/or second outer conductor layers has the first structure, the first and/or second intermediate conductor layers has a second conductor layer structure including metal foil and plating film layers, and the via conductors include a group integrally formed with the first structure and including constricted via conductors each having a constricted portion.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: September 7, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Publication number: 20210208504
    Abstract: A substrate processing method includes: forming a coating film on a substrate by supplying a resist liquid which is photosensitive to extreme ultraviolet (EUV) light to a surface of the substrate; forming a semi-solidified film by volatilizing a solvent contained in the coating film without heating the solvent; irradiating the semi-solidified film with EUV light thereby exposing the semi-solidified film with EUV light; and supplying a developer to the substrate after the exposure of the semi-solidified film.
    Type: Application
    Filed: May 17, 2019
    Publication date: July 8, 2021
    Inventors: Takashi YAMAUCHI, Shinichiro KAWAKAMI, Masashi ENOMOTO
  • Publication number: 20210181638
    Abstract: A liquid treatment apparatus includes: a substrate holder for holding a substrate; a discharge nozzle for discharging a treatment liquid onto the substrate; a liquid supply pipe for supplying the treatment liquid from a treatment liquid storage source to the discharge nozzle; a gas pipe that encompasses the liquid supply pipe and through which an inert gas for adjusting the temperature of the treatment liquid flows in a space between the gas pipe and the liquid supply pipe; a processing container in which the substrate holder, the discharge nozzle, the liquid supply pipe, and the gas pipe are provided; and an atmosphere gas supply part for supplying an atmosphere gas into the processing container. The gas pipe is provided so that an extension portion between an upstream end inside the processing container and an encompassing portion is folded back inside the processing container in a plan view.
    Type: Application
    Filed: December 7, 2020
    Publication date: June 17, 2021
    Inventors: Takashi YAMAUCHI, Daiki SHIBATA, Kohei KAWAKAMI
  • Patent number: 11036140
    Abstract: A substrate processing apparatus includes a film forming processing unit configured to form a metal-containing resist film on a substrate; a heat treatment unit configured to perform a heating processing on the substrate on which the film is formed and in which an exposure processing is performed on the film; a developing processing unit configured to perform a developing processing on the film formed on the substrate on which the heating processing is performed; and an adjustment controller configured to reduce a difference between substrates in an amount of water that reacts in the film formed on the substrate during the heating processing.
    Type: Grant
    Filed: January 21, 2020
    Date of Patent: June 15, 2021
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Shinichiro Kawakami, Hiroshi Mizunoura, Yohei Sano, Takashi Yamauchi, Masashi Enomoto
  • Patent number: 10986729
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including metal foil and plating film layers and includes first conductor pattern having a side surface curved toward inner side of the first pattern, the first and/or second outer conductor layers has the first laminated structure and includes the first conductor pattern having the side surface curved toward the inner side of the first pattern, and the first and/or second intermediate conductor layers has a second laminated structure including metal foil and plating film layers and includes second conductor pattern having a side surface curved toward outer side of the second pattern.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: April 20, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Patent number: 10945334
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including a metal foil layer and a plating film layer, the first and/or second outer conductor layers has the first laminated structure, the first and/or second intermediate conductor layers has a second laminated structure including a metal foil layer and a plating film layer, and the first and second laminated structures are formed such that a surface of the second laminated structure on a side away from the core layer has unevenness smaller than unevenness of a surface of the first laminated structure on a side away from the core layer.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: March 9, 2021
    Assignee: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Publication number: 20200395171
    Abstract: An ignition coil includes a primary coil and a secondary coil magnetically coupled from each other; a core cover disposed around the primary coil and the secondary coil; and an outer peripheral core supported by the core cover. The core cover includes a pair of support portions that support the outer peripheral core; and at least one of the pair of support portions includes a flexible portion that elastically presses the outer peripheral core, the flexible portion having flexibility in an arrangement direction separating the pair of support portions.
    Type: Application
    Filed: June 9, 2020
    Publication date: December 17, 2020
    Inventor: Takashi YAMAUCHI
  • Publication number: 20200315009
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate layers, second conductor layers including second inner, outer and intermediate layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the insulating layers such that each via conductor connects two conductor layers and is integrally formed with one of the conductor layers on side away from the core layer. The first and/or second inner conductor layers has a first conductor layer structure including metal foil and plating film layers, the first and/or second outer conductor layers has the first structure, the first and/or second intermediate conductor layers has a second conductor layer structure including metal foil and plating film layers, and the via conductors include a group integrally formed with the first structure and including constricted via conductors each having a constricted portion.
    Type: Application
    Filed: March 26, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200315013
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including metal foil and plating film layers and includes first conductor pattern having a side surface curved toward inner side of the first pattern, the first and/or second outer conductor layers has the first laminated structure and includes the first conductor pattern having the side surface curved toward the inner side of the first pattern, and the first and/or second intermediate conductor layers has a second laminated structure including metal foil and plating film layers and includes second conductor pattern having a side surface curved toward outer side of the second pattern.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200315012
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including a metal foil layer and a plating film layer, the first and/or second outer conductor layers has the first laminated structure, the first and/or second intermediate conductor layers has a second laminated structure including a metal foil layer and a plating film layer, and the first and second laminated structures are formed such that a surface of the second laminated structure on a side away from the core layer has unevenness smaller than unevenness of a surface of the first laminated structure on a side away from the core layer.
    Type: Application
    Filed: March 24, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200315011
    Abstract: A wiring substrate includes a core layer, first conductor layers including a first inner conductor layer, a first outer conductor layer and a first intermediate conductor layer, second conductor layers including a second inner conductor layer, a second outer conductor layer and a second intermediate conductor layer, and interlayer insulating layers interposed between the first conductor layers and between the second conductor layers. The first and/or second inner conductor layers has a first laminated structure including a metal foil layer and a plating film layer, the first and/or second outer conductor layers has the first laminated structure, and the first and/or second intermediate conductor layers has a second laminated structure including a metal foil layer and a plating film layer and includes a conductor pattern formed such that an upper surface of the conductor pattern has an edge portion forming an inclined portion inclined toward the core layer.
    Type: Application
    Filed: March 24, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD
    Inventors: Takenobu NAKAMURA, Takahiro YAMAZAKI, Takashi YAMAUCHI, Toshihide MAKINO
  • Publication number: 20200315002
    Abstract: A wiring substrate includes a core layer, first conductor layers including first inner, outer and intermediate conductor layers, second conductor layers including second inner, outer and intermediate conductor layers, interlayer insulating layers interposed between the first conductor layers and between the second conductor layers, and via conductors formed in the core layer such that each via conductor decreases in diameter from one of the inner conductor layers toward the other one of the inner conductor layers and that the other one of the inner conductor layers has thickness greater than thickness of the one of the inner conductor layers. The first and/or second inner conductor layers includes a first laminated structure including metal foil and plating film layers, the first and/or second outer conductor layers includes the first laminated structure, and the first and/or second intermediate conductor layers includes a second laminated structure including metal foil and plating film layers.
    Type: Application
    Filed: March 27, 2020
    Publication date: October 1, 2020
    Applicant: IBIDEN CO., LTD.
    Inventors: Takenobu Nakamura, Takahiro Yamazaki, Takashi Yamauchi, Toshihide Makino
  • Publication number: 20200279736
    Abstract: A technique for suppressing a metal component from remaining at a bottom of a mask pattern when the mask pattern is formed using a metal-containing resist film. A developable anti reflection film 103 is previously formed below a resist film 104. Further, after exposing and developing the wafer W, TMAH is supplied to the wafer W to remove a surface of the anti-reflection film 103 facing a bottom of the recess pattern 110 of the resist film 104. Therefore, the metal component 105 can be suppressed from remaining at the bottom of the recess pattern 110. Therefore, when the SiO2 film 102 is subsequently etched using the pattern of the resist film 104, the etching is not hindered, so that defects such as bridges can be suppressed.
    Type: Application
    Filed: October 22, 2018
    Publication date: September 3, 2020
    Inventors: Takashi YAMAUCHI, Shinichiro KAWAKAMI, Masashi ENOMOTO