Patents by Inventor Takatsugu Baba

Takatsugu Baba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5936282
    Abstract: An input protection circuit is formed on a semiconductor substrate. A double well structure is formed by an impurity diffusion region and a protective circuit region containing the input protection circuit. A first potential setting source is connected to a separation region to set a predetermined potential, and a second potential setting source is connected to the semiconductor substrate to set a potential in the semiconductor substrate such that the separation region and the semiconductor substrate are reversely biased. Whereby, the semiconductor substrate including an internal circuit element and a peripheral circuit element is electrically isolated from the double well structure.
    Type: Grant
    Filed: April 17, 1997
    Date of Patent: August 10, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takatsugu Baba, Takashi Ohsawa