Patents by Inventor Takayuki Nagayasu

Takayuki Nagayasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070041430
    Abstract: If a spreading factor is small, the number of multiple paths is large, and an interference signal power is larger than a desired signal power, a conventional RAKE combining receiver presents insufficient suppression of the interference signal by means of despreading, resulting in largely degraded reception performances.
    Type: Application
    Filed: July 27, 2004
    Publication date: February 22, 2007
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Kenichiro Yamazaki, Takayuki Nagayasu
  • Patent number: 7123667
    Abstract: Analog processing sections (3a to 3b) generate base band analog signal from the received signal. A/D converting sections (4a to 4b) the outputs of the analog processing sections into digital signals. Soft-decision output equalizers (11a to 11b) make soft decisions on the digital signals. A combining section (12) combines the results of the soft decisions to output a soft-decision value. An error correcting section (13) performs error correction processing with respect to the soft-decision value.
    Type: Grant
    Filed: July 6, 2001
    Date of Patent: October 17, 2006
    Assignee: Mitusbishi Denki Kabushiki Kaisha
    Inventor: Takayuki Nagayasu
  • Patent number: 7020459
    Abstract: A receiver receives a signal that has been encoded, interleaved, burst mapping processed, and modulated via a wireless channel. The receiver judges a modulation scheme for a burst based on a part of a known sequence in the burst; calculates a soft decision value for the burst based on the judged modulation scheme; and changes the soft decision value, if the judged modulation scheme is determined to be incorrect.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: March 28, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayuki Nagayasu
  • Patent number: 6952570
    Abstract: A frequency offset correction value estimation section (21) receives a signal including a predetermined fixed pattern from a transmission side, thereafter, selects a combination of fixed patterns used in a process of estimating a frequency offset is selected depending on the state of a channel, and an estimation result of the frequency offset calculated by the combination of the fixed patterns is output as a correction value of a determined frequency offset. A frequency offset correction section (22) receives the received signal obtained after the correction is performed for correcting a frequency offset of the received signal on the basis of the correction value, and an equalizer (23) demodulates the received signal by using a predetermined algorithm.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: October 4, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayuki Nagayasu
  • Publication number: 20030012310
    Abstract: A modulation scheme judging section (61) judges a modulation scheme for each burst based on a part of known sequence in a received signal, a soft decision section (62) gives a soft decision on the received signal, based on the judged modulation scheme, a soft decision value alteration controller (63) provides control, if there is a wrong judgement in the judgement of a past modulation scheme made during a period in which there has been no change in the modulation scheme, for correcting a corresponding soft decision value, a soft decision value storage (64) stores the soft decision value output by the soft decision section, and corrects the soft decision value under the control of the soft decision value alteration controller (63), a deinterleaver (16) performs a deinterleaving process to the stored soft decision value, and a decoder (17) decodes the soft decision value as after the deinterleaving process.
    Type: Application
    Filed: July 30, 2002
    Publication date: January 16, 2003
    Inventor: Takayuki Nagayasu
  • Publication number: 20020136334
    Abstract: Analog processing sections (3a to 3b) generate base band analog signal from the received signal. A/D converting sections (4a to 4b) the outputs of the analog processing sections into digital signals. Soft-decision output equalizers (11a to 11b) make soft decisions on the digital signals. A combining section (12) combines the results of the soft decisions to output a soft-decision value. An error correcting section (13) performs error correction processing with respect to the soft-decision value.
    Type: Application
    Filed: March 20, 2002
    Publication date: September 26, 2002
    Inventor: Takayuki Nagayasu
  • Publication number: 20020123311
    Abstract: A frequency offset correction value estimation section (21) receives a signal including a predetermined fixed pattern from a transmission side, thereafter, selects a combination of fixed patterns used in a process of estimating a frequency offset is selected depending on the state of a channel, and an estimation result of the frequency offset calculated by the combination of the fixed patterns is output as a correction value of a determined frequency offset. A frequency offset correction section (22) receives the received signal obtained after the correction is performed for correcting a frequency offset of the received signal on the basis of the correction value, and an equalizer (23) demodulates the received signal by using a predetermined algorithm.
    Type: Application
    Filed: March 14, 2002
    Publication date: September 5, 2002
    Inventor: Takayuki Nagayasu
  • Patent number: 6347126
    Abstract: Distortion of a received signal due to intersymbol interference as well as to frequency offset is corrected. For this reason, a frequency offset correcting circuit 21 corrects a received signal based on a frequency-offset estimated value. A first CIR estimating circuit 22 estimates CIR estimated values at a first position according to a known training sequence in the corrected received signal. Also, a second estimating circuit 24 updates the CIR estimated values with the LMS algorithm according to the corrected received signals as well as to the decision value outputted from the equalizer 13 with the CIR estimated values at the first position as initial values and obtains CIR estimated values at a second position apart from the first position.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: February 12, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takayuki Nagayasu, Keishi Murakami
  • Patent number: 6269124
    Abstract: A data transmission system, a receiver, and a recording medium in which a re-coder (16) generates pseudo transmission signals based on the virtual received data after a decoder (15) generates virtual received data based on virtual decision data from a virtual decision circuit (12), and a soft-decision circuit (18) outputs soft-decision data so as to decrease the number of different bits between the pseudo transmission signals and the received signals, and the received data are generated based on the soft-decision data.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: July 31, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takayuki Nagayasu, Keishi Murakami
  • Patent number: 5844946
    Abstract: A receiver for soft decision and decoding for deriving an appropriate soft-decision value so as to reduce the error rate at the output of a decoder such as a Viterbi decoder. A length V of transmission sequences that can be generated is set greater than a memory length L of a channel (V>L). By providing as many as 2N (N=2.sup.V) branch metric producing circuits and as many as N add/compare/select apparatus (ACS apparatus) for respective states corresponding to combinations of transmission sequence data of V, the accuracy of a soft-decision value is enhanced. Further, a soft-decision value producing circuit performs a process not based on path metrics but based on survivor metrics. This allows a digital signal processor to easily perform the process.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: December 1, 1998
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayuki Nagayasu
  • Patent number: 5684836
    Abstract: In a receiver, a frequency offset estimating circuit inputs a received signal and a decision value from a decision circuit, and estimates a frequency offset. A CIR estimating circuit inputs the estimated frequency offset, the received signal and the decision value, and estimates CIR. A complex conjugate circuit calculates a complex conjugate of the CIR. A multiplication circuit multiplies the complex conjugate and the received signal. Receiving the multiplied value, the decision circuit outputs a decision value.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: November 4, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Takayuki Nagayasu, Hiroshi Kubo