Abstract: A data line driving circuit includes a first buffer circuit configured to drive a data line, and a second buffer circuit configured to drive a data line. N first data lines (n is a natural number larger than 1), and m second data lines (m is a natural number larger than 1) are alternately arranged in units of data lines as a group. The data line driving circuit further includes a first switch circuit configured to select one of the n first data lines in a first ON period and to connect the selected first data line with the first buffer circuit, and a second switch circuit configured to select one of the m second data lines adjacent to the selected first data line in a second ON period and to connect the selected second data line with the second buffer circuit.

Abstract: An amplifier circuit includes an operational amplifier having first and second input nodes and one output node which is connected to a data line for which a pixel is provided; a feedback circuit having first and second elements which are connected to one of the first and second input nodes at their one ends; and a first switch section. The first switch section switches an operation mode between a first drive mode in which the other end of the first element is connected to the output node and a second drive mode in which the other end of the second element is connected to the output node.