Patents by Inventor Takayuki Takida
Takayuki Takida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11736082Abstract: According to one embodiment, a clipping state detecting circuit includes: a zero-cross detection circuit that detects a zero-cross point of an input signal; an output circuit that converts the input signal into a PWM signal; a clip detection circuit that detects a state in which an output of the output circuit is clipped; and a control circuit that determines a state is a clipping state when a clip time of the output of the output circuit satisfies a condition of a threshold value set in advance with respect to a non-clip time.Type: GrantFiled: August 24, 2021Date of Patent: August 22, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventor: Takayuki Takida
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Patent number: 11683017Abstract: According to one embodiment, a class-D amplifier including: a PWM modulator that outputs a PWM modulation signal in response to an input signal; and a drive circuit that amplifies the PWM modulation signal, and supplies it to an output end. The drive circuit includes: a first output transistor whose main current path is connected between a power source supplying end and the output end; a second output transistor having a size larger than a size of the first output transistor; and a resistance element that is connected between the main current path of the first output transistor and the output end.Type: GrantFiled: July 29, 2021Date of Patent: June 20, 2023Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Takayuki Takida
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Publication number: 20220094311Abstract: According to one embodiment, a class-D amplifier including: a PWM modulator that outputs a PWM modulation signal in response to an input signal; and a drive circuit that amplifies the PWM modulation signal, and supplies it to an output end. The drive circuit includes: a first output transistor whose main current path is connected between a power source supplying end and the output end; a second output transistor having a size larger than a size of the first output transistor; and a resistance element that is connected between the main current path of the first output transistor and the output end.Type: ApplicationFiled: July 29, 2021Publication date: March 24, 2022Inventor: Takayuki Takida
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Publication number: 20220085783Abstract: According to one embodiment, a clipping state detecting circuit includes: a zero-cross detection circuit that detects a zero-cross point of an input signal; an output circuit that converts the input signal into a PWM signal; a clip detection circuit that detects a state in which an output of the output circuit is clipped; and a control circuit that determines a state is a clipping state when a clip time of the output of the output circuit satisfies a condition of a threshold value set in advance with respect to a non-clip time.Type: ApplicationFiled: August 24, 2021Publication date: March 17, 2022Inventor: Takayuki Takida
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Patent number: 10903744Abstract: A signal generation circuit of an embodiment is a signal generation circuit giving a generated signal corresponding to an input signal to an amplification circuit configured to generate an output within a range based on a power supply voltage, the signal generation circuit including: a first voltage generating portion configured to generate an internal midpoint potential based on the power supply voltage; a second voltage generating portion configured to generate a starting voltage of the generated signal based on the power supply voltage and the amplification circuit; a resistance circuit configured to output a voltage caused to attenuate or pass through on the basis of the internal midpoint potential; a controlling portion configured to change a resistance value of the resistance circuit; and an output circuit configured to output the output voltage of the resistance circuit as the generated signal.Type: GrantFiled: September 19, 2019Date of Patent: January 26, 2021Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Takayuki Takida
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Publication number: 20200161970Abstract: A signal generation circuit of an embodiment is a signal generation circuit giving a generated signal corresponding to an input signal to an amplification circuit configured to generate an output within a range based on a power supply voltage, the signal generation circuit including: a first voltage generating portion configured to generate an internal midpoint potential based on the power supply voltage; a second voltage generating portion configured to generate a starting voltage of the generated signal based on the power supply voltage and the amplification circuit; a resistance circuit configured to output a voltage caused to attenuate or pass through on the basis of the internal midpoint potential; a controlling portion configured to change a resistance value of the resistance circuit; and an output circuit configured to output the output voltage of the resistance circuit as the generated signal.Type: ApplicationFiled: September 19, 2019Publication date: May 21, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Takayuki TAKIDA
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Patent number: 10340910Abstract: A drive circuit includes a first level shift circuit, a second level shift circuit, a pre-driver, and a high-side transistor. The first level shift circuit outputs a first switch signal. The second level shift circuit outputs a second switch signal. The pre-driver includes a first switch portion configured to perform switching in accordance with the first switch signal and a second switch portion configured to output a gate signal in accordance with the second switch signal. The high-side transistor outputs a high-side output signal to an output terminal with a second power supply voltage which is fed in accordance with the gate signal.Type: GrantFiled: March 16, 2018Date of Patent: July 2, 2019Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Takayuki Takida, Ryota Miwa, Takafumi Kiyono
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Publication number: 20190089347Abstract: A drive circuit includes a first level shift circuit, a second level shift circuit, a pre-driver, and a high-side transistor. The first level shift circuit outputs a first switch signal. The second level shift circuit outputs a second switch signal. The pre-driver includes a first switch portion configured to perform switching in accordance with the first switch signal and a second switch portion configured to output a gate signal in accordance with the second switch signal. The high-side transistor outputs a high-side output signal to an output terminal with a second power supply voltage which is fed in accordance with the gate signal.Type: ApplicationFiled: March 16, 2018Publication date: March 21, 2019Inventors: Takayuki Takida, Ryota Miwa, Takafumi Kiyono
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Patent number: 9143095Abstract: A DC-DC converter includes a first capacitor which can be charged by a power-supply voltage; a second capacitor that generates the output voltage using electric charge previously discharged by the first capacitor; a comparator that compares the output voltage with a reference voltage and outputs a comparison signal that shows whether the output voltage is below the reference voltage; multiple switches that switch to allow the first capacitor either to be charged or to discharge its charge to the second capacitor, and a controller that controls the switch timing of the multiple switches on the basis of the comparison signal.Type: GrantFiled: September 6, 2012Date of Patent: September 22, 2015Assignee: Kabushiki Kaisha ToshibaInventor: Takayuki Takida
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Patent number: 9071128Abstract: DC-DC converter, wherein in a case of positive voltage generation, the controlling circuit controls the first to fourth switch circuits with the first to fourth controlling signals, thereby permitting conduction between the first node and the first reference node and conduction between the eighth node and the fourth reference node, then permitting conduction between the fourth node and the second reference node and conduction between the sixth node and the third reference node, and then permitting conduction between the second node and the first reference node.Type: GrantFiled: August 22, 2013Date of Patent: June 30, 2015Assignee: Kabushiki Kaisha ToshibaInventor: Takayuki Takida
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Publication number: 20140232358Abstract: DC-DC converter, wherein in a case of positive voltage generation, the controlling circuit controls the first to fourth switch circuits with the first to fourth controlling signals, thereby permitting conduction between the first node and the first reference node and conduction between the eighth node and the fourth reference node, then permitting conduction between the fourth node and the second reference node and conduction between the sixth node and the third reference node, and then permitting conduction between the second node and the first reference node.Type: ApplicationFiled: August 22, 2013Publication date: August 21, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Takayuki Takida
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Patent number: 8619925Abstract: An automatic gain control circuit configured so that a response time is reduced until a gain converges is disclosed. A variable gain amplifier is configured so that a gain is varied by a first control signal. A detector circuit detects an intensity of an output signal of the variable gain amplifier. A comparator compares an output signal of the detector circuit with a reference signal. An integrator integrates a signal corresponding to an output signal of the comparator, and outputs an integration result to the variable gain amplifier as the first control signal. A loop gain control unit, connected between the comparator and the integrator, is configured so that a loop gain is varied by a second control signal. A level detection unit detects an intensity of an output signal of the integrator and outputs a detection result to the loop gain control unit as the second control signal.Type: GrantFiled: March 8, 2010Date of Patent: December 31, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Takayuki Takida, Masanori Furuta
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Publication number: 20130223650Abstract: A DC-DC converter includes a first capacitor which can be charged by a power-supply voltage; a second capacitor that generates the output voltage using electric charge previously discharged by the first capacitor; a comparator that compares the output voltage with a reference voltage and outputs a comparison signal that shows whether the output voltage is below the reference voltage; multiple switches that switch to allow the first capacitor either to be charged or to discharge its charge to the second capacitor, and a controller that controls the switch timing of the multiple switches on the basis of the comparison signal.Type: ApplicationFiled: September 6, 2012Publication date: August 29, 2013Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Takayuki Takida
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Publication number: 20110285466Abstract: A power amplifier circuit has a Gm amplifier, first and second transistors, third and fourth transistors consisting a mirror circuit, fifth and sixth transistors consisting a mirror circuit, seventh and eighth transistors consisting a mirror circuit, a ninth transistor of the first conductivity type which is connected at a first end thereof to the first power supply rail, connected at a second end thereof to a signal output terminal for outputting an amplified signal, and connected at a control terminal thereof to the inverting output terminal, and a tenth transistor of the second conductivity type connected at a first end thereof to the signal output terminal, connected at a second end thereof to the second power supply rail, and connected at a control terminal thereof to the noninverting output terminal.Type: ApplicationFiled: February 28, 2011Publication date: November 24, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takayuki Takida, Ryota Miwa
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Publication number: 20110234909Abstract: According to one embodiment, a receiving device includes an amplifier for amplifying signals received from the outside, a decimation filter for decimating signals converted to digital signals, a channel selection filter for selecting a desired wave included in signals from the decimation filter, and a DAGC for amplifying the desired wave selected by the channel selection filter.Type: ApplicationFiled: March 10, 2011Publication date: September 29, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masato Ishii, Yoshihiro Yoshida, Toshimasa Adachi, Shigehito Saigusa, Takayuki Takida
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Publication number: 20100296612Abstract: An automatic gain control circuit configured so that a response time is reduced until a gain converges is disclosed. A variable gain amplifier is configured so that a gain is varied by a first control signal. A detector circuit detects an intensity of an output signal of the variable gain amplifier. A comparator compares an output signal of the detector circuit with a reference signal. An integrator integrates a signal corresponding to an output signal of the comparator, and outputs an integration result to the variable gain amplifier as the first control signal. A loop gain control unit, connected between the comparator and the integrator, is configured so that a loop gain is varied by a second control signal. A level detection unit detects an intensity of an output signal of the integrator and outputs a detection result to the loop gain control unit as the second control signal.Type: ApplicationFiled: March 8, 2010Publication date: November 25, 2010Applicant: Kabushiki Kaisha ToshibaInventors: Takayuki Takida, Masanori Furuta