Abstract: A wireless communication circuit includes: an antenna; a transmitter circuit having an output amplifier outputting a transmission signal to the antenna; a receiver circuit having an LNA into which a reception signal from the antenna is input; and a matching circuit provided between the antenna and the input of the LNA. The LNA has a MOS input transistor receiving at its gate the reception signal from the antenna via the matching circuit, and includes a variable capacitance provided between the gate and source of the input transistor, the capacitance value of the variable capacitance being changed between the transmission time and the reception time.

Abstract: An AGC circuit for a radio receiver includes a detector converting a high frequency signal into a baseband signal. To reduce generation of a DC offset, the AGC circuit includes: a variable gain amplifier having an amplifier circuit and a high-pass filter, the amplifier circuit amplifying the baseband signal with a variable gain and the high-pass filter coupled to the amplifier circuit and having a cut-off frequency which is variable; a controller supplying a gain control signal; and a blocker temporarily blocking the high frequency signal. Using the block control signal, the controller causes the blocker to start blocking the high frequency signal, before the cut-off frequency of the high-pass filter is switched from high to low.

Abstract: An AGC circuit for a radio receiver includes a detector converting a high frequency signal into a baseband signal. To reduce generation of a DC offset, the AGC circuit includes: a variable gain amplifier having an amplifier circuit and a high-pass filter, the amplifier circuit amplifying the baseband signal with a variable gain and the high-pass filter coupled to the amplifier circuit and having a cut-off frequency which is variable; a controller supplying a gain control signal; and a blocker temporarily blocking the high frequency signal. Using the block control signal, the controller causes the blocker to start blocking the high frequency signal, before the cut-off frequency of the high-pass filter is switched from high to low.

Abstract: An injection locked frequency divider includes a ring oscillator, an input terminal, an output terminal and a control voltage terminal. The ring oscillator has a three-stage cascade connection of a first amplification circuit including an N-channel MOS type transistor and P-channel MOS type transistors, a second amplification circuit configured in the same manner as the first amplification circuit and a third amplification circuit configured likewise. A high frequency signal is input to a gate terminal of each P-channel MOS type transistor. A predetermined DC control voltage is supplied to a gate terminal of each P-channel MOS type transistor.

Abstract: An injection locked frequency divider includes a ring oscillator, an input terminal, an output terminal and a control voltage terminal. The ring oscillator has a three-stage cascade connection of a first amplification circuit including an N-channel MOS type transistor and P-channel MOS type transistors, a second amplification circuit configured in the same manner as the first amplification circuit and a third amplification circuit configured likewise. A high frequency signal is input to a gate terminal of each P-channel MOS type transistor. A predetermined DC control voltage is supplied to a gate terminal of each P-channel MOS type transistor.

Abstract: A receiving apparatus includes an amplification section that amplifies a received signal and a frequency conversion section that converts a frequency of the received signal, from a radio frequency to a baseband, the baseband having a lower frequency than the radio frequency. A gain control section amplifies, by a predetermined gain, the signal that has been subjected to the frequency conversion to the baseband. A voltage calibration section performs calibration on an offset voltage generated in the signal subjected to frequency conversion to the baseband. A time constant control section sets a first time constant during a reception operation and sets a second time constant, which is reduced with respect to the first time constant, during the calibration.

Abstract: A frequency mixer device is provided with a mixer circuit having an input cell that amplifies an input signal and a switching cell that mixes the amplified input signal with a switching signal and outputs a multiplied signal, and a DC offset compensator that detects the input level of the input signal and outputs a compensation signal based on that detection signal, the compensation signal being supplied to the mixer circuit so as to compensate a DC offset included in the multiplied signal. The compensation signal that the DC offset compensator outputs is added to the output signal of the input cell so as to compensate the DC offset. Low frequency noise included in the compensation signal is converted to a frequency near that of the switching signal, and does not range over the desired waveband of the mixer output.

Abstract: A receiving apparatus includes an amplification section that amplifies a received signal and a frequency conversion section that converts a frequency of the received signal, from a radio frequency to a baseband, the baseband having a lower frequency than the radio frequency. A gain control section amplifies, by a predetermined gain, the signal that has been subjected to the frequency conversion to the baseband. A voltage calibration section performs calibration on an offset voltage generated in the signal subjected to frequency conversion to the baseband. A time constant control section sets a first time constant during a reception operation and sets a second time constant, which is reduced with respect to the first time constant, during the calibration.

Abstract: A reception apparatus capable of calibrating a DC offset voltage fast and with high accuracy even in an environment in which interferer exist without causing noise characteristic degradation. In this apparatus, a digital signal processing section (108) controls the gain of a received signal at such a gain that predetermined reception quality is obtained. A time constant control circuit (110) controls the time constant and makes the amount of attenuation of the received signal of a low pass filter (106a) more moderate compared to the case where a DC offset voltage is not calibrated during DC offset voltage calibration. A voltage calibration circuit (111) calibrates the DC offset voltage generated in the received signal when controlling the gain.

Abstract: A direct conversion receiver includes a mixer for converting an RF signal into a baseband signal, a dynamic DC offset compensator for compensating for a dynamic DC offset caused by the effect of second order nonlinear distortion of the mixer on an interfering wave that enters the input terminals of the mixer, and a static DC offset compensator for compensating for a static DC offset caused by self-mixing of a local signal and a leakage component of the local signal that appears at the input terminals of the mixer. The static DC offset compensation starts at a time t1 after a DC offset compensation operation has started. The static DC offset compensation is finished at the next time t2, and then the dynamic DC offset compensation starts. The dynamic DC offset compensation is finished at the next time t3. With this configuration, only a change in DC offset due to the dynamic DC offset is compensated after compensating for the static DC offset component.

Abstract: A reception apparatus capable of calibrating a DC offset voltage fast and with high accuracy even in an environment in which interferer exist without causing noise characteristic degradation. In this apparatus, a digital signal processing section (108) controls the gain of a received signal at such a gain that predetermined reception quality is obtained. A time constant control circuit (110) controls the time constant and makes the amount of attenuation of the received signal of a low pass filter (106a) more moderate compared to the case where a DC offset voltage is not calibrated during DC offset voltage calibration. A voltage calibration circuit (111) calibrates the DC offset voltage generated in the received signal when controlling the gain.

Abstract: A DC offset calibration system includes: a mixer 1 for direct conversion; a detector 2 that detects a level of an RF input signal; a controller 4 that generates a compensation signal for compensating for a dynamic DC offset based on an output from the detector; a comparator 9 that discriminates a polarity of the DC offset; a static DC offset compensator 13 that generates a static DC offset compensation signal for making a DC offset when there is no input of the RF input signal zero; and an adjustment signal generator 16 that generates an adjustment signal for determining the magnitude of the compensation signal generated by the controller.

Abstract: A direct conversion receiver includes a mixer for converting an RF signal into a baseband signal, a dynamic DC offset compensator for compensating for a dynamic DC offset caused by the effect of second order nonlinear distortion of the mixer on an interfering wave that enters the input terminals of the mixer, and a static DC offset compensator for compensating for a static DC offset caused by self-mixing of a local signal and a leakage component of the local signal that appears at the input terminals of the mixer. The static DC offset compensation starts at a time t1 after a DC offset compensation operation has started. The static DC offset compensation is finished at the next time t2, and then the dynamic DC offset compensation starts. The dynamic DC offset compensation is finished at the next time t3. With this configuration, only a change in DC offset due to the dynamic DC offset is compensated after compensating for the static DC offset component.

Abstract: A frequency mixer is provided with a mixer circuit having an input cell that amplifies an input signal and a switching cell that mixes the amplified input signal with a switching signal and outputs a multiplied signal, and a DC offset compensator that detects the input level of the input signal and outputs a compensation signal based on that detection signal, and compensates the DC offset included in the output signal of the mixer circuit by supplying the compensation signal to the mixer circuit. The DC offset compensator is provided with a detector of the input signal level that is input to the mixer circuit, a limiter circuit that attaches a limit to the output of the detector, and a controller that generates a signal that compensates the DC offset included in the mixer output signal based on the limited detector output.

Abstract: A frequency mixer device is provided with a mixer circuit having an input cell that amplifies an input signal and a switching cell that mixes the amplified input signal with a switching signal and outputs a multiplied signal, and a DC offset compensator that detects the input level of the input signal and outputs a compensation signal based on that detection signal, the compensation signal being supplied to the mixer circuit so as to compensate a DC offset included in the multiplied signal. The compensation signal that the DC offset compensator outputs is added to the output signal of the input cell so as to compensate the DC offset. Low frequency noise included in the compensation signal is converted to a frequency near that of the switching signal, and does not range over the desired waveband of the mixer output.

Abstract: A filter device is provided that can easily achieve reduction in current consumption and whose variations can be corrected. A phase difference of a reference filter is detected by a phase difference detector, a control signal for correcting variations that is obtained as a result of the detection is held in a register, and a cut-off frequency of a main filter is selected according to the control signal thus held. Thus, once variations are detected, the reference filter and the phase difference detector that are used for detection of variations become no longer necessary and their operations can be halted, thereby achieving reduction in current consumption.

Abstract: An air flow shutting member is removably disposed between the radiator and the engine so as to block the air flow which has passed through the radiator from contacting the engine. An air discharging structure is associated with the shutting member for smoothly discharging the air which has been blocked by the shutting member into the open air under the engine room.

Abstract: A structure of a defroster nozzle for an automotive vehicle includes a nozzle port having an elongated air outlet and a number of holes through which collars are inserted to accommodate screws for attaching an instrument panel to a vehicle body. The nozzle port extends along the entire width of the windshield so as to evenly defog the windshield.

Abstract: An improved gasket for an air conditioner having at least two separate air conditioning units. The gasket is interposed between the sealing surfaces of the units and comprises a first section of a non-porous material and a second section of a porous foam material. The first section is oriented transverse to the sealing surfaces and the second section is bonded to the first section in a manner of form a unitary, laminated construction. The first section mainly contributes to improving the sealing function of the gasket and the second section which constitutes the major part of the gasket mainly contributes to attaining the required deformability of the gasket.

Abstract: A damper door unit is swingably disposed in an air intake duct for selectively permitting outdoor intake introduction and indoor air introduction. The damper door unit comprises a main door which is swingably connected to the air intake duct to selectively close an outdoor air intake opening and an indoor air intake opening, and an auxiliary door which is swingably connected to the main door to selectively close and open an opening formed in the main door. When of warming of the passenger compartment is required, the main door takes a position to achieve outdoor air introduction. However, under low speed cruising of the vehicle or at standstill of the vehicle with the engine idling, the auxiliary door opens to a certain extent thereby permitting a certain degree of indoor air introduction.