Patents by Inventor Takehiko Ikegami
Takehiko Ikegami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150235926Abstract: A semiconductor device permitting the reduction of cost is disclosed. In a semiconductor package wherein electrode pads of a semiconductor chip and corresponding inner leads are electrically coupled with each other through a plurality of bonding wires, sensing wires (second and fourth bonding wires) are made thinner than other bonding wires (first and third bonding wires) coupled to inner leads same as those with the sensing wires coupled thereto, thereby reducing the cost of gold wires to attain the reduction in cost of the semiconductor package.Type: ApplicationFiled: May 4, 2015Publication date: August 20, 2015Inventors: Kazuya FUKUHARA, Kiyonori Yoshitomi, Takehiko Ikegami, Yujiro Kawasoe
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Patent number: 9040358Abstract: A semiconductor device permitting the reduction of cost is disclosed. In a semiconductor package wherein electrode pads of a semiconductor chip and corresponding inner leads are electrically coupled with each other through a plurality of bonding wires, sensing wires (second and fourth bonding wires) are made thinner than other bonding wires (first and third bonding wires) coupled to inner leads same as those with the sensing wires coupled thereto, thereby reducing the cost of gold wires to attain the reduction in cost of the semiconductor package.Type: GrantFiled: August 25, 2014Date of Patent: May 26, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Kazuya Fukuhara, Kiyonori Yoshitomi, Takehiko Ikegami, Yujiro Kawasoe
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Publication number: 20140363926Abstract: A semiconductor device permitting the reduction of cost is disclosed. In a semiconductor package wherein electrode pads of a semiconductor chip and corresponding inner leads are electrically coupled with each other through a plurality of bonding wires, sensing wires (second and fourth bonding wires) are made thinner than other bonding wires (first and third bonding wires) coupled to inner leads same as those with the sensing wires coupled thereto, thereby reducing the cost of gold wires to attain the reduction in cost of the semiconductor package.Type: ApplicationFiled: August 25, 2014Publication date: December 11, 2014Inventors: Kazuya FUKUHARA, Kiyonori YOSHITOMI, Takehiko IKEGAMI, Yujiro KAWASOE
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Patent number: 8853004Abstract: Disclosed is a technique in which an excessive resin can be stably cut and removed in a molding step. In a step for separating part of a runner leading to a resin-sealing body from the resin-sealing body, the runner is formed by a first runner and a second runner coupled to the first runner and the resin-sealing body. The runner is separated from a middle of the second runner by supporting, with a first supporting portion, the second runner from the side of the second surface of a lead frame, and by pushing down, with a break pin, the first runner in the direction from the side of the first surface of the lead frame toward the side of the second surface thereof, while the resin-sealing body is in a condition of floating in the air.Type: GrantFiled: March 4, 2013Date of Patent: October 7, 2014Assignee: Renesas Electronics CorporationInventors: Junji Sakakibara, Takehiko Ikegami
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Patent number: 8846455Abstract: A semiconductor device permitting the reduction of cost is disclosed. In a semiconductor package wherein electrode pads of a semiconductor chip and corresponding inner leads are electrically coupled with each other through a plurality of bonding wires, sensing wires (second and fourth bonding wires) are made thinner than other bonding wires (first and third bonding wires) coupled to inner leads same as those with the sensing wires coupled thereto, thereby reducing the cost of gold wires to attain the reduction in cost of the semiconductor package.Type: GrantFiled: February 25, 2013Date of Patent: September 30, 2014Assignee: Renesas Electronics CorporationInventors: Kazuya Fukuhara, Kiyonori Yoshitomi, Takehiko Ikegami, Yujiro Kawasoe
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Publication number: 20130237014Abstract: Disclosed is a technique in which an excessive resin can be stably cut and removed in a molding step. In a step for separating part of a runner leading to a resin-sealing body from the resin-sealing body, the runner is formed by a first runner and a second runner coupled to the first runner and the resin-sealing body. The runner is separated from a middle of the second runner by supporting, with a first supporting portion, the second runner from the side of the second surface of a lead frame, and by pushing down, with a break pin, the first runner in the direction from the side of the first surface of the lead frame toward the side of the second surface thereof, while the resin-sealing body is in a condition of floating in the air.Type: ApplicationFiled: March 4, 2013Publication date: September 12, 2013Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Junji SAKAKIBARA, Takehiko IKEGAMI
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Patent number: 8384229Abstract: A semiconductor device permitting the reduction of cost is disclosed. In a semiconductor package wherein electrode pads of a semiconductor chip and corresponding inner leads are electrically coupled with each other through a plurality of bonding wires, sensing wires (second and fourth bonding wires) are made thinner than other bonding wires (first and third bonding wires) coupled to inner leads same as those with the sensing wires coupled thereto, thereby reducing the cost of gold wires to attain the reduction in cost of the semiconductor package.Type: GrantFiled: October 27, 2010Date of Patent: February 26, 2013Assignee: Renesas Electronics CorporationInventors: Kazuya Fukuhara, Kiyonori Yoshitomi, Takehiko Ikegami, Yujiro Kawasoe
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Publication number: 20110101544Abstract: A semiconductor device permitting the reduction of cost is disclosed. In a semiconductor package wherein electrode pads of a semiconductor chip and corresponding inner leads are electrically coupled with each other through a plurality of bonding wires, sensing wires (second and fourth bonding wires) are made thinner than other bonding wires (first and third bonding wires) coupled to inner leads same as those with the sensing wires coupled thereto, thereby reducing the cost of gold wires to attain the reduction in cost of the semiconductor package.Type: ApplicationFiled: October 27, 2010Publication date: May 5, 2011Inventors: Kazuya FUKUHARA, Kiyonori Yoshitomi, Takehiko Ikegami, Yujiro Kawasoe
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Patent number: 6830446Abstract: A clamping apparatus includes upper and lower platens; one or more tiebars connecting the platens; and an intermediate platen between the upper and lower platens for movement relative to and along the tiebars. Upper and lower mold halves are provided on the upper and intermediate platens, respectively. A linkage connects the lower and intermediate platens. The linkage includes upper and lower links connected with each other for rotation on an intermediate shaft. The upper and lower links are pivotably supported on first and second shafts fixed to the intermediate and lower platens, repectively. The intermediate shaft is operatively connected with a drive mechanism so that the drive mechanism transmits a driving force to the linkage, and the lower platen is moved relative to the intermediate platen. A set of a radical needle bearing and a thrust bearing is used for at least one of the intermediate, first, and second shafts.Type: GrantFiled: October 4, 2002Date of Patent: December 14, 2004Assignees: Mitsubishi Electric Engineering Company Limited, Renesas Technology Corp.Inventors: Hiroyoshi Harada, Itaru Matsuo, Takehiko Ikegami, Hiromichi Yamada, Jyunji Sakakibara, Hiroaki Tanoue
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Publication number: 20030108636Abstract: A clamping apparatus includes upper and lower platens; one or more tiebars for connecting the platens; an intermediate platen provided between the upper and lower platens for movement relative to and along the tiebars. Upper and lower mold halves are provided on the upper and intermediate platens, respectively. A linkage is provided for connecting the lower and intermediate platens. The linkage includes upper and lower links connected with each other for rotation on an intermediate shaft. The upper and lower links are pivotably supported on first and second shafts fixed on the intermediate and lower platens, respectively. The intermediate shaft is operatively connected with the drive mechanism so that the mechanism transmits a driving force to the linkage, so that the lower platen is moved relative to the intermediate platen. A set of radial needle bearing and thrust bearing is used for at least one of the intermediate, first and second shafts.Type: ApplicationFiled: October 4, 2002Publication date: June 12, 2003Applicants: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Company LimitedInventors: Hiroyoshi Harada, Itaru Matsuo, Takehiko Ikegami, Hiromichi Yamada, Junji Sakakibara, Hiroaki Tanoue
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Patent number: 5987737Abstract: A device and method for positioning a resin-sealed lead frame that includes semiconductor devices and resin for sealing the semiconductor devices on the lead frame. A break unit is provided for moving the resin-sealed lead frame to a break table. The break unit includes a vacuum suction portion to hold the resin-sealed lead frame during movement and to release it when the resin-sealed lead frame is brought into a receiving opening associated with the break table. The receiving opening is defined by a plurality of guides with the outer tip portions of the guides providing the receiving opening as a space larger than that occupied by the outer configuration of the resin-sealed lead frame. The guides have a slope to position the resin-sealed lead frame onto the break table after it is released in the receiving opening. The break unit further includes push down pins for pushing down and breaking off unwanted extra portions of resin from beneath the resin-sealed lead frame.Type: GrantFiled: December 6, 1995Date of Patent: November 23, 1999Assignees: Mitsubishi Denki Kabushiki Kaisha, Mitsubishi Electric Engineering Co., Ltd.Inventors: Hiroki Mieda, Junzi Sakakibara, Takehiko Ikegami