Abstract: A method of manufacturing a semiconductor device by using an exposure apparatus having a reticle stage and a projection optical system includes a first period in which substrates are exposed by using a first reticle arranged on the reticle stage, a second period in which substrates are exposed by using a second reticle arranged on the reticle stage, and a third period which is between the first and second periods. The method includes changing, in at least part of the third period, the first reticle arranged on the reticle stage to the second reticle, and performing control, in the first and second periods, to adjust temperature distribution of an optical element of the projection optical system so as to reduce change in aberration of the projection optical system. The third period is shorter than the first period.

Abstract: A method of manufacturing a semiconductor device by using an exposure apparatus having a reticle stage and a projection optical system includes a first period in which substrates are exposed by using a first reticle arranged on the reticle stage, a second period in which substrates are exposed by using a second reticle arranged on the reticle stage, and a third period which is between the first and second periods. The method includes changing, in at least part of the third period, the first reticle arranged on the reticle stage to the second reticle, and performing control, in the first and second periods, to adjust temperature distribution of an optical element of the projection optical system so as to reduce change in aberration of the projection optical system. The third period is shorter than the first period.

Abstract: A semiconductor device includes a plurality of wirings each having a damascene structure on a semiconductor layer, wherein the plurality of wirings includes a first wiring and a second wiring adjacent to each other, wherein the first wiring includes, along a direction in which the first wiring extends, a first portion, a second portion, and a third portion located between the first portion and the second portion, and wherein a width of the third portion is larger than each of a width of the first portion and a width of the second portion.

Abstract: An inspection apparatus inspecting a wafer on which a plurality of patterns are formed by a plurality of exposure shots, the inspection apparatus comprising: acquisition unit configured to acquire first information representing a positional relation between an inspection mark included in a pattern formed by a first exposure shot and an inspection mark included in a pattern formed by a second exposure shot, and second information representing a positional relation between the inspection mark included in the pattern formed by the second exposure shot and an inspection mark included in a pattern formed by a third exposure shot; and derivation unit configured to derive a linear component of an error caused by a reticle, and a linear component of an error caused by a position of a wafer, on the basis of the first information and the second information.

Abstract: An imaging device includes a pixel circuit region that includes a plurality of pixel circuits arranged in an array therein and a plurality of light guide portions. The imaging device also includes a peripheral circuit region that is positioned at a periphery of the pixel circuit region and includes a peripheral circuit. The imaging device also includes an intermediate region that is positioned between the pixel circuit region and the peripheral circuit region, forms a boundary with the pixel circuit region and the peripheral circuit region, and includes a plurality of dummy light guide portions and a plurality of contacts through which a reference potential of the plurality of pixel circuits is supplied.

Abstract: An imaging device includes a pixel circuit region that includes a plurality of pixel circuits arranged in an array therein and a plurality of light guide portions. The imaging device also includes a peripheral circuit region that is positioned at a periphery of the pixel circuit region and includes a peripheral circuit. The imaging device also includes an intermediate region that is positioned between the pixel circuit region and the peripheral circuit region, forms a boundary with the pixel circuit region and the peripheral circuit region, and includes a plurality of dummy light guide portions and a plurality of contacts through which a reference potential of the plurality of pixel circuits is supplied.

Abstract: An imaging device includes a pixel circuit region that includes a plurality of pixel circuits arranged in an array therein and a plurality of light guide portions. The imaging device also includes a peripheral circuit region that is positioned at a periphery of the pixel circuit region and includes a peripheral circuit. The imaging device also includes an intermediate region that is positioned between the pixel circuit region and the peripheral circuit region, forms a boundary with the pixel circuit region and the peripheral circuit region, and includes a plurality of dummy light guide portions and a plurality of contacts through which a reference potential of the plurality of pixel circuits is supplied.

Abstract: A solid-state imaging device has a first area in which a plurality of pixels are provided, a second area provided on an outer side with respect to the first area, and a third area provided on the outer side with respect to the second area. An inner-lens layer provided over the first to third areas has an opening. An insulating film provided below the inner-lens layer also has an opening.

Abstract: A vertical machining center includes a base; a tilting rotary table, a tool spindle, a tilting shaft, a recessed area, a slide door, and an inner cover. The tilting rotary table is disposed on the base and configured to turn and tilt a table face of a rotary table. The tool spindle is rotatable about a vertical axis line and movable in an X axis direction, a Y axis direction, and a Z axis direction. The tilting shaft is disposed in the tilting rotary table and oriented in the Y axis direction. The recessed area is disposed on a front surface of the vertical machining center. The recessed area is adjacent to a support supporting the tilting shaft. The slide door is configured to cover the front surface. The inner cover is integral with the slide door. The inner cover is configured to cover the recessed area.

Abstract: A solid-state imaging device has a first area in which a plurality of pixels are provided, a second area provided on an outer side with respect to the first area, and a third area provided on the outer side with respect to the second area. An inner-lens layer provided over the first to third areas has an opening. An insulating film provided below the inner-lens layer also has an opening.

Abstract: A vertical machining center includes a base; a tilting rotary table, a tool spindle, a tilting shaft, a recessed area, a slide door, and an inner cover. The tilting rotary table is disposed on the base and configured to turn and tilt a table face of a rotary table. The tool spindle is rotatable about a vertical axis line and movable in an X axis direction, a Y axis direction, and a Z axis direction. The tilting shaft is disposed in the tilting rotary table and oriented in the Y axis direction. The recessed area is disposed on a front surface of the vertical machining center. The recessed area is adjacent to a support supporting the tilting shaft. The slide door is configured to cover the front surface. The inner cover is integral with the slide door. The inner cover is configured to cover the recessed area.

Abstract: An image capturing device includes an intermediate region located between a pixel circuit region and a peripheral circuit region and forming a boundary with the pixel circuit region and the peripheral circuit region. The pixel circuit region, the peripheral circuit region, and the intermediate region are provided with a semiconductor layer, a first wiring layer on the semiconductor layer, and a second wiring layer located away from the semiconductor layer relative to the first wiring layer. Pixel circuits and a peripheral circuit are connected via one of at least the first wiring layer and the second wiring layer in the intermediate region. The area occupancy of the one wiring layer in the intermediate region relative to a total area thereof is between 0.5 times and 1.5 times the area occupancy of the one wiring layer in the pixel circuit region relative to a total area thereof.

Abstract: A photoelectric conversion apparatus includes a lens array including a plurality of convex meniscus lenses. Each of the convex meniscus lenses is provided between a first member and a second member. The first member has a lower refractive index than each of the convex meniscus lenses and has convex surfaces conforming to respective concave surfaces of the convex meniscus lenses. The second member has a lower refractive index than each of the convex meniscus lenses and has concave surfaces conforming to respective convex surfaces of the convex meniscus lenses. The first member is provided between a group of the convex meniscus lenses and a group of the photoelectric conversion portions.

Abstract: A method of manufacturing a solid-state imaging apparatus is provided. The method includes forming, above a substrate having an effective pixel region and a non-effective pixel regions, a structure including first and second members located above the effective and non-effective pixel regions respectively, and a third member covering the first and second members, forming, above the third member, a mask having first and second apertures located above the first and second members respectively, and forming a first hole exposing the first member by etching the structure through the first aperture and a second hole exposing the second member by etching the structure through the second aperture. In the etching, the first and second holes are concurrently formed and etching of the structure is finished based on that the second hole has reached the second member.

Abstract: An imaging device includes a pixel circuit region that includes a plurality of pixel circuits arranged in an array therein and a plurality of light guide portions. The imaging device also includes a peripheral circuit region that is positioned at a periphery of the pixel circuit region and includes a peripheral circuit. The imaging device also includes an intermediate region that is positioned between the pixel circuit region and the peripheral circuit region, forms a boundary with the pixel circuit region and the peripheral circuit region, and includes a plurality of dummy light guide portions and a plurality of contacts through which a reference potential of the plurality of pixel circuits is supplied.

Abstract: An image capturing device includes an intermediate region located between a pixel circuit region and a peripheral circuit region and forming a boundary with the pixel circuit region and the peripheral circuit region. The pixel circuit region, the peripheral circuit region, and the intermediate region are provided with a semiconductor layer, a first wiring layer on the semiconductor layer, and a second wiring layer located away from the semiconductor layer relative to the first wiring layer. Pixel circuits and a peripheral circuit are connected via one of at least the first wiring layer and the second wiring layer in the intermediate region. The area occupancy of the one wiring layer in the intermediate region relative to a total area thereof is between 0.5 times and 1.5 times the area occupancy of the one wiring layer in the pixel circuit region relative to a total area thereof.

Abstract: A solid-state imaging apparatus and a manufacturing method of a solid-state imaging apparatus are provided. Metal wirings 102 and 103 are formed in an effective pixel region A and out-of effective pixel region B of a semiconductor substrate 100, and an etch stop layer 118 is formed over the metal wirings 102 and 103. Moreover, an insulating film 119 is formed on the etch stop layer 118, and another metal wiring 104 is formed on the insulating film 119 in the out-of effective pixel region B. Next, the insulating film 119 in the effective pixel region A is removed by using the etch stop layer 118, and interlayer lenses 105 are formed in the step in the effective pixel region A where the insulating film 119 is removed.

Abstract: A photoelectric conversion apparatus includes a lens array including a plurality of convex meniscus lenses. Each of the convex meniscus lenses is provided between a first member and a second member. The first member has a lower refractive index than each of the convex meniscus lenses and has convex surfaces conforming to respective concave surfaces of the convex meniscus lenses. The second member has a lower refractive index than each of the convex meniscus lenses and has concave surfaces conforming to respective convex surfaces of the convex meniscus lenses. The first member is provided between a group of the convex meniscus lenses and a group of the photoelectric conversion portions.

Abstract: A solid-state imaging apparatus and a manufacturing method of a solid-state imaging apparatus are provided. Metal wirings 102 and 103 are formed in an effective pixel region A and out-of effective pixel region B of a semiconductor substrate 100, and an etch stop layer 118 is formed over the metal wirings 102 and 103. Moreover, an insulating film 119 is formed on the etch stop layer 118, and another metal wiring 104 is formed on the insulating film 119 in the out-of effective pixel region B. Next, the insulating film 119 in the effective pixel region A is removed by using the etch stop layer 118, and interlayer lenses 105 are formed in the step in the effective pixel region A where the insulating film 119 is removed.

Abstract: A solid-state imaging apparatus and a manufacturing method of a solid-state imaging apparatus are provided. Metal wirings 102 and 103 are formed in an effective pixel region A and out-of effective pixel region B of a semiconductor substrate 100, and an etch stop layer 118 is formed over the metal wirings 102 and 103. Moreover, an insulating film 119 is formed on the etch stop layer 118, and another metal wiring 104 is formed on the insulating film 119 in the out-of effective pixel region B. Next, the insulating film 119 in the effective pixel region A is removed by using the etch stop layer 118, and interlayer lenses 105 are formed in the step in the effective pixel region A where the insulating film 119 is removed.