Patents by Inventor Takehisa Hatano
Takehisa Hatano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210184041Abstract: Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.Type: ApplicationFiled: February 2, 2021Publication date: June 17, 2021Inventors: Shunpei YAMAZAKI, Masahiro TAKAHASHI, Tatsuya HONDA, Takehisa HATANO
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Patent number: 10991829Abstract: Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.Type: GrantFiled: October 18, 2018Date of Patent: April 27, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masahiro Takahashi, Tatsuya Honda, Takehisa Hatano
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Publication number: 20190051755Abstract: Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.Type: ApplicationFiled: October 18, 2018Publication date: February 14, 2019Inventors: Shunpei YAMAZAKI, Masahiro TAKAHASHI, Tatsuya HONDA, Takehisa HATANO
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Patent number: 10153378Abstract: Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.Type: GrantFiled: September 11, 2015Date of Patent: December 11, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masahiro Takahashi, Tatsuya Honda, Takehisa Hatano
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Patent number: 10008587Abstract: A semiconductor device which includes an oxide semiconductor and has favorable electrical characteristics is provided. In the semiconductor device, an oxide semiconductor film and an insulating film are formed over a substrate. Side surfaces of the oxide semiconductor film are in contact with the insulating film. The oxide semiconductor film includes a channel formation region and regions containing a dopant between which the channel formation region is sandwiched. A gate insulating film is formed on and in contact with the oxide semiconductor film. A gate electrode with sidewall insulating films is formed over the gate insulating film. A source electrode and a drain electrode are formed in contact with the oxide semiconductor film and the insulating film.Type: GrantFiled: August 14, 2014Date of Patent: June 26, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Atsuo Isobe, Toshihiko Saito, Takehisa Hatano, Hideomi Suzawa, Shinya Sasagawa, Junichi Koezuka, Yuichi Sato, Shinji Ohno
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Patent number: 9570594Abstract: A semiconductor device which is miniaturized while favorable characteristics thereof are maintained is provided. In addition, the miniaturized semiconductor device is provided with a high yield. The semiconductor device has a structure including an oxide semiconductor film provided over a substrate having an insulating surface; a source electrode layer and a drain electrode layer which are provided in contact with side surfaces of the oxide semiconductor film and have a thickness larger than that of the oxide semiconductor film; a gate insulating film provided over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a gate electrode layer provided in a depressed portion formed by a step between a top surface of the oxide semiconductor film and top surfaces of the source electrode layer and the drain electrode layer.Type: GrantFiled: February 22, 2016Date of Patent: February 14, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takehisa Hatano, Sachiaki Tezuka, Atsuo Isobe
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Publication number: 20160204268Abstract: A semiconductor device which is miniaturized while favorable characteristics thereof are maintained is provided. In addition, the miniaturized semiconductor device is provided with a high yield. The semiconductor device has a structure including an oxide semiconductor film provided over a substrate having an insulating surface; a source electrode layer and a drain electrode layer which are provided in contact with side surfaces of the oxide semiconductor film and have a thickness larger than that of the oxide semiconductor film; a gate insulating film provided over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a gate electrode layer provided in a depressed portion formed by a step between a top surface of the oxide semiconductor film and top surfaces of the source electrode layer and the drain electrode layer.Type: ApplicationFiled: February 22, 2016Publication date: July 14, 2016Inventors: Takehisa HATANO, Sachiaki TEZUKA, Atsuo ISOBE
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Patent number: 9269798Abstract: A semiconductor device which is miniaturized while favorable characteristics thereof are maintained is provided. In addition, the miniaturized semiconductor device is provided with a high yield. The semiconductor device has a structure including an oxide semiconductor film provided over a substrate having an insulating surface; a source electrode layer and a drain electrode layer which are provided in contact with side surfaces of the oxide semiconductor film and have a thickness larger than that of the oxide semiconductor film; a gate insulating film provided over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a gate electrode layer provided in a depressed portion formed by a step between a top surface of the oxide semiconductor film and top surfaces of the source electrode layer and the drain electrode layer.Type: GrantFiled: June 11, 2015Date of Patent: February 23, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takehisa Hatano, Sachiaki Tezuka, Atsuo Isobe
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Publication number: 20160005877Abstract: Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.Type: ApplicationFiled: September 11, 2015Publication date: January 7, 2016Inventors: Shunpei YAMAZAKI, Masahiro TAKAHASHI, Tatsuya HONDA, Takehisa HATANO
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Publication number: 20150279977Abstract: A semiconductor device which is miniaturized while favorable characteristics thereof are maintained is provided. In addition, the miniaturized semiconductor device is provided with a high yield. The semiconductor device has a structure including an oxide semiconductor film provided over a substrate having an insulating surface; a source electrode layer and a drain electrode layer which are provided in contact with side surfaces of the oxide semiconductor film and have a thickness larger than that of the oxide semiconductor film; a gate insulating film provided over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a gate electrode layer provided in a depressed portion formed by a step between a top surface of the oxide semiconductor film and top surfaces of the source electrode layer and the drain electrode layer.Type: ApplicationFiled: June 11, 2015Publication date: October 1, 2015Inventors: Takehisa HATANO, Sachiaki TEZUKA, Atsuo ISOBE
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Patent number: 9136388Abstract: Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.Type: GrantFiled: July 16, 2012Date of Patent: September 15, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masahiro Takahashi, Tatsuya Honda, Takehisa Hatano
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Patent number: 9136361Abstract: To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.Type: GrantFiled: March 12, 2015Date of Patent: September 15, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Sachiaki Tezuka, Atsuo Isobe, Takehisa Hatano, Kazuya Hanaoka
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Patent number: 9117916Abstract: A semiconductor device which is miniaturized while favorable characteristics thereof are maintained is provided. In addition, the miniaturized semiconductor device is provided with a high yield. The semiconductor device has a structure including an oxide semiconductor film provided over a substrate having an insulating surface; a source electrode layer and a drain electrode layer which are provided in contact with side surfaces of the oxide semiconductor film and have a thickness larger than that of the oxide semiconductor film; a gate insulating film provided over the oxide semiconductor film, the source electrode layer, and the drain electrode layer; and a gate electrode layer provided in a depressed portion formed by a step between a top surface of the oxide semiconductor film and top surfaces of the source electrode layer and the drain electrode layer.Type: GrantFiled: October 5, 2012Date of Patent: August 25, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takehisa Hatano, Sachiaki Tezuka, Atsuo Isobe
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Patent number: 9105749Abstract: In a transistor including a wide band gap semiconductor layer as a semiconductor layer, a wide band gap semiconductor layer is separated into an island shape by an insulating layer with passivation properties for preventing atmospheric components from permeating. The edge portion of the island shape wide band gap semiconductor layer is in contact with the insulating film; thus, moisture or atmospheric components can be prevented from entering from the edge portion of the semiconductor layer to the wide band gap semiconductor layer.Type: GrantFiled: May 8, 2012Date of Patent: August 11, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shinya Sasagawa, Akihiro Ishizuka, Takehisa Hatano
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Publication number: 20150187917Abstract: To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.Type: ApplicationFiled: March 12, 2015Publication date: July 2, 2015Inventors: Sachiaki TEZUKA, Atsuo ISOBE, Takehisa HATANO, Kazuya HANAOKA
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Patent number: 9018629Abstract: To provide a miniaturized transistor having high electric characteristics. A conductive film to be a source electrode layer and a drain electrode layer is formed to cover an oxide semiconductor layer and a channel protection layer, and then a region of the conductive film, which overlaps with the oxide semiconductor layer and the channel protection layer, is removed by chemical mechanical polishing treatment. Precise processing can be performed accurately because an etching step using a resist mask is not performed in the step of removing part of the conductive film to be the source electrode layer and the drain electrode layer. With the channel protection layer, damage to the oxide semiconductor layer or a reduction in film thickness due to the chemical mechanical polishing treatment on the conductive film can be suppressed.Type: GrantFiled: October 5, 2012Date of Patent: April 28, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Sachiaki Tezuka, Atsuo Isobe, Takehisa Hatano, Kazuya Hanaoka
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Patent number: 8952379Abstract: Provided is a semiconductor device in which an oxide semiconductor layer is provided; a pair of wiring layers which are provided with the gate electrode layer interposed therebetween are electrically connected to the low-resistance regions; and electrode layers are provided to be in contact with the low-resistance regions, below regions where the wiring layers are formed.Type: GrantFiled: September 10, 2012Date of Patent: February 10, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Atsuo Isobe, Hiromachi Godo, Takehisa Hatano, Sachiaki Tezuka, Suguru Hondo, Naoto Yamade, Junichi Koezuka
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Publication number: 20150037932Abstract: A semiconductor device which includes an oxide semiconductor and has favorable electrical characteristics is provided. In the semiconductor device, an oxide semiconductor film and an insulating film are formed over a substrate. Side surfaces of the oxide semiconductor film are in contact with the insulating film. The oxide semiconductor film includes a channel formation region and regions containing a dopant between which the channel formation region is sandwiched. A gate insulating film is formed on and in contact with the oxide semiconductor film. A gate electrode with sidewall insulating films is formed over the gate insulating film. A source electrode and a drain electrode are formed in contact with the oxide semiconductor film and the insulating film.Type: ApplicationFiled: August 14, 2014Publication date: February 5, 2015Inventors: Shunpei YAMAZAKI, Atsuo ISOBE, Toshihiko SAITO, Takehisa HATANO, Hideomi SUZAWA, Shinya SASAGAWA, Junichi KOEZUKA, Yuichi SATO, Shinji OHNO
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Patent number: 8809992Abstract: A semiconductor device which includes an oxide semiconductor and has favorable electrical characteristics is provided. In the semiconductor device, an oxide semiconductor film and an insulating film are formed over a substrate. Side surfaces of the oxide semiconductor film are in contact with the insulating film. The oxide semiconductor film includes a channel formation region and regions containing a dopant between which the channel formation region is sandwiched. A gate insulating film is formed on and in contact with the oxide semiconductor film. A gate electrode with sidewall insulating films is formed over the gate insulating film. A source electrode and a drain electrode are formed in contact with the oxide semiconductor film and the insulating film.Type: GrantFiled: January 23, 2012Date of Patent: August 19, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Atsuo Isobe, Toshihiko Saito, Takehisa Hatano, Hideomi Suzawa, Shinya Sasagawa, Junichi Koezuka, Yuichi Sato, Shinji Ohno
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Patent number: 8508276Abstract: The latch circuit includes a transistor whose channel region is formed with an oxide semiconductor (OS). Data is held in a node that is electrically connected to an output terminal and one of a source and a drain of the transistor and brought into a floating state when the transistor is turned off. Note that the oxide semiconductor has a band gap wider than silicon and an intrinsic carrier density lower than silicon. By using such an oxide semiconductor for the channel region of the transistor, the transistor with an extremely low off-state current (leakage current) can be realized.Type: GrantFiled: August 19, 2011Date of Patent: August 13, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Takehisa Hatano