Abstract: A signal transmission circuit includes a printed circuit board including a surface layer including a signal transmission path that transmits a signal, a signal line through hole that connects the signal transmission path with a signal layer arranged in an inner layer of the printed circuit board, a ground layer of the inner layer of the printed circuit board that forms a return current transmission path for the signal transmission path, and a ground through hole that is connected to the ground layer adjacent to the signal line through hole. A ground pattern including ground areas disposed with a certain distance therebetween and a side ground area connected with at least one end side of the ground areas is disposed at positions of both sides of the signal transmission path. The ground through hole is disposed to connect the ground pattern with the ground layer.

Abstract: A signal transmission circuit includes a printed circuit board including a surface layer including a signal transmission path that transmits a signal, a signal line through hole that connects the signal transmission path with a signal layer arranged in an inner layer of the printed circuit board, a ground layer of the inner layer of the printed circuit board that forms a return current transmission path for the signal transmission path, and a ground through hole that is connected to the ground layer adjacent to the signal line through hole. A ground pattern including ground areas disposed with a certain distance therebetween and a side ground area connected with at least one end side of the ground areas is disposed at positions of both sides of the signal transmission path. The ground through hole is disposed to connect the ground pattern with the ground layer.

Abstract: A skew adjustment circuit includes: flip flop circuits for taking in an input signal in response to first clock signals; a clock phase adjustment circuit for adjusting phases of second clock signals, based on the second clock signals generated based on a reference clock signal and an output signal from the flip flop circuits; a phase interval detection circuit for detecting a phase interval between the first clock signals, based on a reference value; and a phase interval adjustment circuit for performing adjustment such that phase intervals become equal to each other between the second clock signals adjusted by the clock phase adjustment circuit, based on a skew adjustment signal from the phase interval detection circuit. The reference value is obtained by calibration, and the second clock signals adjusted by the phase interval adjustment circuit are provided as the first clock signals to the flip flop circuits.

Abstract: An equalizer includes a data sampler that samples input data and outputs a time-series data string according to the input data, an arithmetic circuit that multiplies a data string output before reference data in the data string output from the data sampler by a tap coefficient and forms the input data by an arithmetic operation of a multiplication result and an input signal, a tap coefficient calculation circuit that updates the tap coefficient based on a data string output before the reference data, and a determination circuit that receives the reference data and data output after the reference data in the data string and controls presence or absence of update of the tap coefficient performed by the tap coefficient calculation circuit.

Abstract: A skew adjustment circuit includes: flip flop circuits for taking in an input signal in response to first clock signals; a clock phase adjustment circuit for adjusting phases of second clock signals, based on the second clock signals generated based on a reference clock signal and an output signal from the flip flop circuits; a phase interval detection circuit for detecting a phase interval between the first clock signals, based on a reference value; and a phase interval adjustment circuit for performing adjustment such that phase intervals become equal to each other between the second clock signals adjusted by the clock phase adjustment circuit, based on a skew adjustment signal from the phase interval detection circuit. The reference value obtained by calibration, and the second clock signals adjusted by the phase interval adjustment circuit are provided as the first clock signals to the flip flop circuits.

Abstract: An equalizer includes a data sampler that samples input data and outputs a time-series data string according to the input data, an arithmetic circuit that multiplies a data string output before reference data in the data string output from the data sampler by a tap coefficient and forms the input data by an arithmetic operation of a multiplication result and an input signal, a tap coefficient calculation circuit that updates the tap coefficient based on a data string output before the reference data, and a determination circuit that receives the reference data and data output after the reference data in the data string and controls presence or absence of update of the tap coefficient performed by the tap coefficient calculation circuit.