Abstract: A first copper alloy sputtering target comprising 0.5 to 4.0 wt % of Al and 0.5 wtppm or less of Si and a second copper alloy sputtering target comprising 0.5 to 4.0 wt % of Sn and 0.5 wtppm or less of Mn are disclosed. The first and/or the second alloy sputtering target can further comprise one or more elements selected from among Sb, Zr, Ti, Cr, Ag, Au, Cd, In and As in a total amount of 1.0 wtppm or less. A semiconductor element wiring formed by the use of the above targets is also disclosed. The above copper alloy sputtering target allows the formation of a wiring material for a semiconductor element, in particular, a seed layer being stable, uniform and free from the occurrence of coagulation during electrolytic copper plating and exhibits excellent sputtering film formation characteristics.

Abstract: Provided is a first copper alloy sputtering target comprising 0.5 to 4.0 wt % of Al and 0.5 wtppm or less of Si; a second copper alloy sputtering target comprising 0.5 to 4.0 wt % of Sn and 0.5 wtppm or less of Mn; the first or the second alloy sputtering target further comprising one or more selected from among Sb, Zr, Ti, Cr, Ag, Au, Cd, In and As in a total amount of 1.0 wtppm or less; and a semiconductor element wiring formed by the use of the above target. The above copper alloy sputtering target allows the formation of a wiring material for a semiconductor element, in particular, a seed layer being stable, uniform and free from the occurrence of coagulation during electrolytic copper plating and exhibits excellent sputtering film formation characteristics.

Abstract: A hafnium alloy target containing either or both of Zr and Ti in a gross amount of 100 wtppm-10 wt % in Hf; wherein the average crystal grain size is 1-100 ?m, the impurities of Fe, Cr and Ni are respectively 1 wtppm or less, and the habit plane ratio of the plane {002} and three planes {103}, {014} and {015} lying within 35° from {002} is 55% or greater, and the variation in the total sum of the intensity ratios of these four planes depending on locations is 20% or less. As a result, obtained is a hafnium alloy target having favorable deposition property and deposition speed, which generates few particles, and which is suitable for forming a high dielectric gate insulation film such as HfO or HfON film, and the manufacturing method thereof.

Abstract: A hafnium alloy target containing either or both of Zr and Ti in a gross amount of 100 wtppm?10 wt % in Hf, wherein the average crystal grain size is 1-100 ?m, the impurities of Fe, Cr and Ni are respectively 1 wtppm or less, and the habit plane ratio of the plane {002} and three planes {103}, {014} and {015} lying within 35° from {002} is 55% or greater, and the variation in the total sum of the intensity ratios of these four planes depending on locations is 20% or less. As a result, obtained is a hafnium alloy target having favorable deposition property and deposition speed, which generates few particles, and which is suitable for forming a high dielectric gate insulation film such as HfO or HfON film, and the manufacturing method thereof.

Abstract: A hafnium alloy target containing either or both of Zr and Ti in a gross amount of 100 wtppm-10 wt % in Hf, wherein the average crystal grain size is 1-100 ?m, the impurities of Fe, Cr and Ni are respectively 1 wtppm or less, and the habit plane ratio of the plane {002} and three planes {103}, {014} and {015} lying within 35° from {002} is 55% or greater, and the variation in the total sum of the intensity ratios of these four planes depending on locations is 20% or less. As a result, obtained is a hafnium alloy target having favorable deposition property and deposition speed, which generates few particles, and which is suitable for forming a high dielectric gate insulation film such as HfO or HfON film, and the manufacturing method thereof.

Abstract: Provided is a hafnium alloy target containing either or both of Zr and Ti in a gross amount of 100 wtppm-10 wt % in Hf, wherein the average crystal grain size is 1-100 ?m, the impurities of Fe, Cr and Ni are respectively 1 wtppm or less, and the habit plane ratio of the plane {002} and three planes {103}, {014} and {015} lying within 35° from {002} is 55% or greater, and the variation in the total sum of the intensity ratios of these four planes depending on locations is 20% or less. As a result, obtained is a hafnium alloy target having favorable deposition property and deposition speed, which generates few particles, and which is suitable for forming a high dielectric gate insulation film such as HfO or HfON film, and the manufacturing method thereof.

Abstract: An electrolytic copper plating method characterized in employing a phosphorous copper anode having a crystal grain size of 1,500 ?m (or more) to 20,000 ?m in an electrolytic copper plating method employing a phosphorous copper anode. Upon performing electrolytic copper plating, an object is to provide an electrolytic copper plating method of a semiconductor wafer for preventing the adhesion of particles, which arise at the anode side in the plating bath, to the plating object such as a semiconductor wafer, a phosphorous copper anode for electrolytic copper plating, and a semiconductor wafer having low particle adhesion plated with such method and anode.

Abstract: The present invention pertains to an electrolytic copper plating method characterized in employing a phosphorous copper anode having a crystal grain size of 1500 ?m (or more) to 20000 ?m in an electrolytic copper plating method employing a phosphorous copper anode. Upon performing electrolytic copper plating, an object is to provide an electrolytic copper plating method of a semiconductor wafer for preventing the adhesion of particles, which arise at the anode side in the plating bath, to the plating object such as a semiconductor wafer, a phosphorous copper anode for electrolytic copper plating, and a semiconductor wafer having low particle adhesion plated with such method and anode.

Abstract: Provided are a packaging device and packaging method of a hollow cathode sputtering target which installs, in the hollow cathode sputtering target, a cover of a size capable of covering a void of the target; provides one or more through-holes to the cover; places a resin bag over them, and performs vacuum suction to the inside of the bag. This packaging device and packaging method of a hollow cathode sputtering target is capable of performing vacuum suction even to the inside of the hollow portion covered with the resin bag.

Abstract: Provided is a copper or copper alloy target/copper alloy backing plate assembly in which the anti-eddy current characteristics and other characteristics required in a magnetron sputtering target are simultaneously pursued in a well balanced manner. This copper or copper alloy target/copper alloy backing plate assembly is used for magnetron sputtering, and the copper alloy backing plate is formed from low beryllium copper alloy or Cu—Ni—Si-based alloy. Further, with this copper or copper alloy target/copper alloy backing plate assembly, the copper alloy backing plate has electrical conductivity of 35 to 60% (IACS), and 0.2% proof stress of 400 to 850 MPa.

Abstract: An electrolytic copper plating method characterized in employing phosphorous copper as the anode upon performing electrolytic copper plating, and performing electrolytic copper plating upon making the crystal grain size of the phosphorous copper anode 10 to 1500 ?m when the anode current density during electrolysis is 3 A/dm2 or more, and making the grain size of the phosphorous copper anode 5 to 1500 ?m when the anode current density during electrolysis is less than 3 A/dm2. The electrolytic copper plating method and phosphorous copper anode used in such electrolytic copper plating method is capable of suppressing the generation of particles such as sludge produced on the anode side within the plating bath, and is capable of preventing the adhesion of particles to a semiconductor wafer. A semiconductor wafer plated with the foregoing method and anode having low particle adhesion are provided.

Abstract: Provided is a hafnium alloy target containing either or both of Zr and Ti in a gross amount of 100 wtppm-10 wt % in Hf, wherein the average crystal grain size is 1-100 ?m, the impurities of Fe, Cr and Ni are respectively 1 wtppm or less, and the habit plane ratio of the plane {002} and three planes {103}, {014} and {015} lying within 350 from {002} is 55% or greater, and the variation in the total sum of the intensity ratios of these four planes depending on locations is 20% or less. As a result, obtained is a hafnium alloy target having favorable deposition property and deposition speed, which generates few particles, and which is suitable for forming a high dielectric gate insulation film such as HfO or HfON film, and the manufacturing method thereof.

Abstract: Provided is a copper alloy sputtering target containing 0.01 to (less than) 0.5 wt % of at least 1 element selected from Al or Sn, and containing Mn or Si in a total amount of 0.25 wtppm or less. The above copper alloy sputtering target allows the formation of a wiring material for a semiconductor element, in particular, a seed layer being stable, uniform and free from the occurrence of coagulation during electrolytic copper plating and exhibits excellent sputtering film formation characteristics. A semiconductor element wiring formed with this target is also provided.

Abstract: Provided is a first copper alloy sputtering target comprising 0.5 to 4.0 wt % of Al and 0.5 wt ppm or less of Si; a second copper alloy sputtering target comprising 0.5 to 4.0 wt % of Sn and 0.5 wt ppm or less of Mn; the first or the second alloy sputtering target further comprising one or more selected from among Sb, Zr, Ti, Cr, Ag, Au, Cd, In and As in a total amount of 1.0 wt ppm or less; and a semiconductor element wiring formed by the use of the above target. The above copper alloy sputtering target allows the formation of a wiring material for a semiconductor element, in particular, a seed layer being stable, uniform and free from the occurrence of coagulation during electrolytic copper plating and exhibits excellent sputtering film formation characteristics.

Abstract: A copper alloy sputtering target most suitable for formation of an interconnection material of a semiconductor device, particularly for formation of a seed layer, characterized in that the target contains 0.4 to 5 wt % of Sn, and the structure of the target does not substantially contain any precipitates, and the resistivity of the target material is 2.2 ??cm or more. This target enables formation of an interconnection material of a semiconductor device, particularly a uniform seed layer stable during copper electroplating and is excellent in sputtering deposition characteristics. A method for manufacturing such a target is also disclosed.

Abstract: A sputtering target having a sprayed coating at least on the side face thereof and producing few particles. The deposit produced on the side face of the sputtering target is prevented from separating and flying.

Abstract: A sputtering target producing few particles, a backing plate or a sputtering apparatus, and a sputtering method producing few particles. An arc-spraying coating film and a plasma-spraying coating film over the former are formed on the sputtering target, a backing plate, or another surface in the sputtering apparatus, where an unwanted film might be formed. Thus a deposit is prevent from separating/flying from the target, backing plate, or another surface where an unwanted film might be formed in the sputtering apparatus.

Abstract: The present invention pertains to an electrolytic copper plating method characterized in employing pure copper as the anode upon performing electrolytic copper plating, and performing electrolytic copper plating with the pure copper anode having a crystal grain diameter of 10 &mgr;m or less or 60 &mgr;m or more or a non-recrystallized anode.

Abstract: The present invention pertains to an electrolytic copper plating method characterized in employing a phosphorous copper anode having a crystal grain size of 1500 &mgr;m (or more) to 20000 &mgr;m in an electrolytic copper plating method employing a phosphorous copper anode. Upon performing electrolytic copper plating, an object is to provide an electrolytic copper plating method of a semiconductor wafer for preventing the adhesion of particles, which arise at the anode side in the plating bath, to the plating object such as a semiconductor wafer, a phosphorous copper anode for electrolytic copper plating, and a semiconductor wafer having low particle adhesion plated with such method and anode.

Abstract: A tantalum or tungsten target-backing plate assembly which comprises a tantalum or tungsten target and a copper alloy backing plate that are subject to diffusion bonding via an aluminum- or aluminum alloy-sheet insert material at least 0.5 mm thick, and which is provided with diffusion bonded interfaces between the respective materials, wherein the assembly suffers only a small deformation after diffusion bonding and is free from separation between the target and the backing plate or from cracking even when the target material and the backing plate differ greatly in thermal expansion, and can survive high power sputtering; and a production method therefor.