Patents by Inventor Takeo Oki

Takeo Oki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8065794
    Abstract: The present invention has for its object to provide a process for manufacturing multilayer printed circuit boards which is capable of simultaneous via hole filling and formation of conductor circuit and via holes of good crystallinity and uniform deposition can be constructed on a substrate and high-density wiring and highly reliable conductor connections can be realized without annealing.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: November 29, 2011
    Assignee: Ibiden Co., Ltd.
    Inventors: Honchin En, Tohru Nakai, Takeo Oki, Naohiro Hirose, Kouta Noda
  • Patent number: 7827680
    Abstract: An electroplating process of electroplating an electrically conductive substrate is described. The process includes electroplating intermittently to a predetermined plating thickness using the substrate surface as a cathode and a plating metal as an anode at a constant voltage between the anode and the cathode by repeating application of a voltage between a cathode and an anode and interruption of the application alternately. It is described that a voltage time/interruption time ratio is 0.1 to 1.0, a voltage time is not longer than 10 seconds, and an interruption time is not less than 1 x 10-12 seconds.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: November 9, 2010
    Assignee: Ibiden Co., Ltd.
    Inventors: Honchin En, Tohru Nakai, Takeo Oki, Naohiro Hirose, Kouta Noda
  • Patent number: 7691189
    Abstract: The present invention is directed to a process for manufacturing multilayer printed circuit boards which is capable of simultaneous via hole filling and formation of conductor circuit and via holes of good crystallinity, and by which uniform deposition can be constructed on a substrate and high-density wiring and highly reliable conductor connections can be realized without annealing.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: April 6, 2010
    Assignee: Ibiden Co., Ltd.
    Inventors: Honchin En, Tohru Nakai, Takeo Oki, Naohiro Hirose, Kouta Noda
  • Publication number: 20090145652
    Abstract: The present invention has for its object to provide a process for manufacturing multilayer printed circuit boards which is capable of simultaneous via hole filling and formation of conductor circuit and via holes of good crystallinity and uniform deposition can be constructed on a substrate and high-density wiring and highly reliable conductor connections can be realized without annealing.
    Type: Application
    Filed: September 26, 2008
    Publication date: June 11, 2009
    Applicant: IBIDEN CO., LTD.
    Inventors: Honchin En, Tohru Nakai, Takeo Oki, Naohiro Hirose, Kouta Noda
  • Publication number: 20070266886
    Abstract: The present invention has for its object to provide a process for manufacturing multilayer printed circuit boards which is capable of simultaneous via hole filling and formation of conductor circuit and via holes of good crystallinity and uniform deposition can be constructed on a substrate and high-density wiring and highly reliable conductor connections can be realized without annealing.
    Type: Application
    Filed: April 17, 2007
    Publication date: November 22, 2007
    Inventors: Honchin En, Tohru Nakai, Takeo Oki, Naohiro Hirose, Kouta Noda
  • Patent number: 7230188
    Abstract: The present invention has for its object to provide a process for manufacturing multilayer printed circuit boards which is capable of simultaneous via hole filling and formation of conductor circuit and via holes of good crystallinity and uniform deposition can be constructed on a substrate and high-density wiring and highly reliable conductor connections can be realized without annealing.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: June 12, 2007
    Assignee: Ibiden Co., Ltd.
    Inventors: Honchin En, Tohru Nakai, Takeo Oki, Naohiro Hirose, Kouta Noda
  • Patent number: 6875291
    Abstract: A tin layer and a zinc layer are stacked sequentially on a given substrate to form a multilayered film composed of the tin layer and the zinc layer. Then, the multilayered film is heated to a given temperature to form a tin-zinc alloy film through the diffusion of the tin elements of the tin layer into the zinc layer.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: April 5, 2005
    Assignee: Susuka National College of Technology
    Inventors: Hideyuki Kanematsu, Tatsumasa Kobayashi, Takeo Oki
  • Publication number: 20040134682
    Abstract: The present invention has for its object to provide a process for manufacturing multilayer printed circuit boards which is capable of simultaneous via hole filling and formation of conductor circuit and via holes of good crystallinity and uniform deposition can be constructed on a substrate and high-density wiring and highly reliable conductor connections can be realized without annealing.
    Type: Application
    Filed: January 6, 2004
    Publication date: July 15, 2004
    Applicant: IBIDEN CO., LTD.
    Inventors: Honchin En, Tohru Nakai, Takeo Oki, Naohiro Hirose, Kouta Noda
  • Patent number: 6709719
    Abstract: A tin layer and a zinc layer are stacked sequentially on a given substrate to form a multilayered film composed of the tin layer and the zinc layer. Then, a laser beam is irradiated onto the multilayered film to produce a tin-zinc alloy film through the inter-diffusion between the tin elements of the tin layer and the zinc elements of the zinc layer.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: March 23, 2004
    Assignee: Susuka National College of Technology
    Inventors: Hideyuki Kanematsu, Yoshihiko Masuo, Takeo Oki, Hirohiko Ohmura
  • Patent number: 6602354
    Abstract: A tin layer and a nickel layer are stacked sequentially on a given substrate to form a multilayered film composed of the tin layer and the nickel layer. Then, the multilayered film is heated to a given temperature to form a tin-nickel alloy film through the diffusion of the tin elements of the tin layer into the nickel layer.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: August 5, 2003
    Assignee: Suzuka National College of Technology
    Inventors: Hideyuki Kanematsu, Tatsumasa Kobayashi, Takeo Oki
  • Patent number: 6527881
    Abstract: A tin layer and a nickel layer are stacked sequentially on a given substrate to form a multilayered film composed of the tin layer and the nickel layer. Then, laser beams are irradiated onto the multilayered film to form a tin-nickel alloy film, having stable phases composed of equilibrium phases such as Ni3Sn phase through the diffusion of the tin elements of the tin layer into the nickel layer.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: March 4, 2003
    Assignee: Suzuka National College of Technology
    Inventors: Hideyuki Kanematsu, Yoshihiko Masuo, Takeo Oki
  • Publication number: 20030026913
    Abstract: A tin layer and a zinc layer are stacked sequentially on a given substrate to form a multilayered film composed of the tin layer and the zinc layer. Then, a laser beam is irradiated onto the multilayered film to produce a tin-zinc alloy film through the inter-diffusion between the tin elements of the tin layer and the zinc elements of the zinc layer.
    Type: Application
    Filed: May 16, 2002
    Publication date: February 6, 2003
    Applicant: SUZUKA NATIONAL COLLEGE OF TECHNOLOGY
    Inventors: Hideyuki Kanematsu, Yoshihiko Masuo, Takeo Oki, Hirohiko Ohmura
  • Publication number: 20030024613
    Abstract: A tin layer and a zinc layer are stacked sequentially on a given substrate to form a multilayered film composed of the tin layer and the zinc layer. Then, the multilayered film is heated to a given temperature to form a tin-zinc alloy film through the diffusion of the tin elements of the tin layer into the zinc layer.
    Type: Application
    Filed: May 16, 2002
    Publication date: February 6, 2003
    Applicant: SUZUKA NATIONAL COLLEGE OF TECHNOLOGY
    Inventors: Hideyuki Kanematsu, Tatsumasa Kobayashi, Takeo Oki
  • Publication number: 20020069943
    Abstract: A tin layer and a nickel layer are stacked sequentially on a given substrate to form a multilayered film composed of the tin layer and the nickel layer. Then, laser beams are irradiated onto the multilayered film to form a tin-nickel alloy film, having stable phases composed of equilibrium phases such as Ni3Sn phase through the diffusion of the tin elements of the tin layer into the nickel layer.
    Type: Application
    Filed: May 23, 2001
    Publication date: June 13, 2002
    Inventors: Hideyuki Kanematsu, Yoshihiko Masuo, Takeo Oki
  • Publication number: 20020046787
    Abstract: A tin layer and a nickel layer are stacked sequentially on a given substrate to form a multilayered film composed of the tin layer and the nickel layer. Then, the multilayered film is heated to a given temperature to form a tin-nickel alloy film through the diffusion of the tin elements of the tin layer into the nickel layer.
    Type: Application
    Filed: May 23, 2001
    Publication date: April 25, 2002
    Inventors: Hideyuki Kanematsu, Tatsumasa Kobayashi, Takeo Oki
  • Patent number: 5230718
    Abstract: Coated abrasive grains and a manufacturing method for them are disclosed. The abrasive grains are coated using an immersion method with a coating comprising at least one substance selected from carbides, borides, and nitrides of a metal, comprising: preparing an immersion bath comprising a molten salt bath containing said metal; and immersing abrasive grains to be treated in said immersion bath for a suitable length of time.
    Type: Grant
    Filed: March 23, 1992
    Date of Patent: July 27, 1993
    Assignees: Takeo Oki, Noritake Co., Ltd.
    Inventors: Takeo Oki, Yoichi Fukuta, Eiichi Hisada, Satoshi Aoki
  • Patent number: 5090969
    Abstract: Coated abrasive grains and a manufacturing method for them are disclosed. The abrasive grains are coated using an immersion method with a coating comprising at least one substance selected from carbides, borides, and nitrides of a metal, comprising:preparing an immersion bath comprising a molten salt bath containing said metal; andimmersing abrasive grains to be treated in said immersion bath for a suitable length of time.
    Type: Grant
    Filed: October 23, 1989
    Date of Patent: February 25, 1992
    Assignees: Takeo Oki, Noritake Co., Ltd.
    Inventors: Takeo Oki, Yoichi Fukuta, Eiichi Hisada, Satoshi Aoki
  • Patent number: 4980631
    Abstract: A method for measuring the surface area of an electrically surface-conductive body comprises applying an a.c. voltage between the body and a corrosion-resistant opposite electrode, both being immersed in an electrically conductive solution having no corrosive influence upon the surface of the body. An electric capacity value for the body is obtained. The measured value is inserted in the function of a surface area and a similar measurement or value obtained using another body having a known surface area in a similar manner. If the body to be treated does not exhibit surface conductivity, the body may be coated on the surface with a conductive material.
    Type: Grant
    Filed: July 19, 1989
    Date of Patent: December 25, 1990
    Inventors: Aisaburo Yagashita, Takeo Oki
  • Patent number: 4560298
    Abstract: A retractable fountain pen employs a cover plate rotatable about a supporting tube by means of a spring to sealingly contact the tapered front end of a cylindrical head portion to close off a central passageway therein. The tube prevents excess deformation of the resilient tapered front end portion.
    Type: Grant
    Filed: November 12, 1982
    Date of Patent: December 24, 1985
    Assignee: Pilot Man-Nen-Hitsu Kabushiki Kaisha
    Inventors: Takeo Oki, Katsutoshi Ichikawa
  • Patent number: 4409072
    Abstract: A method of electrolytically collecting lead from ashes containing lead compounds, comprising the steps of adding the ashes to an aqueous solution of caustic soda, and subjecting the mixture to electrolysis in two stages, i.e., preliminary electrolysis and stationary electrolysis.
    Type: Grant
    Filed: November 8, 1982
    Date of Patent: October 11, 1983
    Assignee: Osaka Lead Refinery Co., Ltd.
    Inventors: Takeo Oki, Isao Hiraki