Patents by Inventor Takeshi Kitatani
Takeshi Kitatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7577319Abstract: A low reflective window structure in an existent electro-absorption optical modulator involves a trading off problem between the increase in the parasitic capacitance and the pile-up. This is because the capacitance density of the pn junction in the window structure is higher compared with the pin junction as the optical absorption region, and the application of electric field to the optical absorption region becomes insufficient in a case of receding the electrode structure from the junction between the optical absorption region and the window structure making it difficult to discharge photo-carriers generated in the optical absorption region.Type: GrantFiled: August 14, 2007Date of Patent: August 18, 2009Assignee: Opnext Japan, Inc.Inventors: Shigeki Makino, Kazunori Shinoda, Takeshi Kitatani
-
Publication number: 20090129421Abstract: In an edge emitting laser having a window region with a ridge-waveguide structure, particularly, in a short cavity type of a laser operated with a low current, there has been a problem of its operating current being increased due to current leakage of the window portion. To solve this problem, in the window region, between an n-type substrate and a p-type cladding layer, a semi-insulating semiconductor layer into which Ru is doped is inserted. Alternatively, a stacked structure of a Ru-doped layer and a Fe-doped layer is introduced.Type: ApplicationFiled: February 8, 2008Publication date: May 21, 2009Inventors: Takeshi Kitatani, Kazunori Shinoda, Koichiro Adachi, Masahiro Aoki
-
Publication number: 20080317422Abstract: In the optical integrated devices with ridge waveguide structure based on the conventional technology, there occur such troubles as generation of a recess in a BJ section to easily cause a crystal defect due to the mass transport phenomenon of InP when a butt joint (BJ) is grown, lowering of reliability of the devices, and lowering in a yield in fabrication of devices. In the present invention, a protection layer made of InGaAsP is provided on the BJ section. The layer has high etching selectivity for the InP cladding layer and remains on the BJ section even after mesa etching.Type: ApplicationFiled: August 23, 2007Publication date: December 25, 2008Inventors: TAKESHI KITATANI, Kazunori Shinoda, Takashi Shiota, Shigeki Makino, Toshihiko Fukamachi
-
Publication number: 20080219315Abstract: A low reflective window structure in an existent electro-absorption optical modulator involves a trading off problem between the increase in the parasitic capacitance and the pile-up. This is because the capacitance density of the pn junction in the window structure is higher compared with the pin junction as the optical absorption region, and the application of electric field to the optical absorption region becomes insufficient in a case of receding the electrode structure from the junction between the optical absorption region and the window structure making it difficult to discharge photo-carriers generated in the optical absorption region.Type: ApplicationFiled: August 14, 2007Publication date: September 11, 2008Inventors: SHIGEKI MAKINO, Kazunori Shinoda, Takeshi Kitatani
-
Publication number: 20080069493Abstract: An integrated optoelectronic device includes optical waveguide elements containing InGaAlAs as a principal component, formed on an InP substrate and connected in an end-to-end fashion by butt jointing. AnInGaAs Player is formed on the InP substrate to suppress the mass transport of InP during the fabrication of the integrated optoelectronic device. The InGaAsP layer is formed before the InP substrate is heated at a crystal growth temperature on the order of 700° C. to form the InGaAlAs optical waveguide element.Type: ApplicationFiled: February 2, 2007Publication date: March 20, 2008Inventors: Kazunori Shinoda, Takashi Shiota, Tomonobu Tsuchiya, Takeshi Kitatani, Masahiro Aoki
-
Patent number: 7340142Abstract: An integrated optoelectronic device includes optical waveguide elements containing InGaAlAs as a principal component, formed on an InP substrate and connected in an end-to-end fashion by butt jointing. An InGaAsP layer is formed on the InP substrate to suppress the mass transport of InP during the fabrication of the integrated optoelectronic device. The InGaAsP layer is formed before the InP substrate is heated at a crystal growth temperature on the order of 700° C. to form the InGaAlAs optical waveguide element.Type: GrantFiled: February 2, 2007Date of Patent: March 4, 2008Assignee: Opnext Japan, Inc.Inventors: Kazunori Shinoda, Takashi Shiota, Tomonobu Tsuchiya, Takeshi Kitatani, Masahiro Aoki
-
Patent number: 7329894Abstract: Since the semiconductor devices including a stacked structure of group-III-V alloy semiconductor layers different in the kind of group-V constituent atom form the so-called band line-up of type II, band discontinuity in the heterostructure has impeded smooth transport of carriers and deteriorated device characteristics. According to the present invention, an energy band structure that makes it possible, in one energy band (e.g., a valence band), to smoothly transport carriers of one of two kinds (e.g., holes) by connecting energy discontinuity in an inclined form or stepwise, and at the same, in the other energy band (e.g., a conduction band), to maintain a barrier effect for carriers of the other kind (e.g., electrons) by retaining energy discontinuity, can be realized for improved transport characteristics of carriers at the heterointerface forming the band line-up of type II.Type: GrantFiled: August 12, 2005Date of Patent: February 12, 2008Assignee: Opnext Japan, Inc.Inventors: Takeshi Kitatani, Masahiro Aoki, Tomonobu Tsuchiya
-
Publication number: 20070241344Abstract: For a semiconductor light emitting device using GaInNAs as an active layer, since GaInNAs includes N, the critical thickness is reduced and it is difficult to lengthen the wavelength of a laser beam. A semiconductor light emitting device is prepared, which has an active layer comprising a quantum well layer formed by successively stacking a GaInNAs layer and a GaInAs layer and GaAs barrier layers stacked on both sides of the quantum well layer. The quantum level of the conduction band is present above the conduction band edge of the GaInAs layer.Type: ApplicationFiled: April 10, 2007Publication date: October 18, 2007Inventors: Koichiro Adachi, Kouji Nakahara, Jun-ichi Kasai, Takeshi Kitatani
-
Publication number: 20060237710Abstract: Since the semiconductor devices including a stacked structure of group-III-V alloy semiconductor layers different in the kind of group-V constituent atom form the so-called band line-up of type II, band discontinuity in the heterostructure has impeded smooth transport of carriers and deteriorated device characteristics. According to the present invention, an energy band structure that makes it possible, in one energy band (e.g., a valence band), to smoothly transport carriers of one of two kinds (e.g., holes) by connecting energy discontinuity in an inclined form or stepwise, and at the same, in the other energy band (e.g., a conduction band), to maintain a barrier effect for carriers of the other kind (e.g., electrons) by retaining energy discontinuity, can be realized for improved transport characteristics of carriers at the heterointerface forming the band line-up of type II.Type: ApplicationFiled: August 12, 2005Publication date: October 26, 2006Inventors: Takeshi Kitatani, Masahiro Aoki, Tomonobu Tsuchiya
-
Patent number: 6821801Abstract: The invention provides a manufacturing method of a laser diode having buried grown layer with less crystal defects and with low consumption power and having high reliability in a buried heterostructure laser diode using an InGaAlAs type material as an active layer, by preventing the inhibition of burying and regrowing of the active layer caused by oxidation of Al contained in the active layer. A manufacturing method of a semiconductor laser diode and the active layer comprises a material at least containing Al and having a buried hetero-cross sectional structure, formation of the buried heterostructure, comprising the steps of fabricating the active layer into a stripe shape or mesa shape by etching including at least wet etching, cleaning the stripe-shape sidewall of the core layer with a gas containing chlorine or other halogen element in a crystal growing apparatus and burying the active layer in the semiconductor.Type: GrantFiled: February 13, 2004Date of Patent: November 23, 2004Assignees: Hitachi, Ltd., OpNext Japan, Inc.Inventors: Hiroshi Sato, Tomonobu Tsuchiya, Masahiro Aoki, Takeshi Kitatani, Noritsugu Takahashi
-
Patent number: 6782032Abstract: In a semiconductor laser for emitting light perpendicular to substrate crystal, including, on the substrate crystal, an active layer for generating light, a cavity structure sandwiching the active layer by reflecting mirrors so as to obtain a laser beam from the light generated from the active layer, and a regrown semiconductor layer between the active layer and one of the reflecting mirrors, a regrown interface or a face very close to the regrown interface is formed by a thin film containing dopants of high concentration. With the configuration, an adverse influence of a contamination deposit on the regrown interface is eliminated by delta-doping the regrown interface. The cost is reduced and device resistance is also reduced to 50 &OHgr; or less. Thus, an edge emitting laser (VCSEL) for realizing a optical module achieving a high speed characteristic over 10 Gb/s is obtained.Type: GrantFiled: May 28, 2002Date of Patent: August 24, 2004Assignee: Hitachi, Ltd.Inventors: Masahiko Kondow, Takeshi Kitatani, Makoto Kudo
-
Patent number: 6697405Abstract: A surface emitting laser device comprising, on a semiconductor substrate, an active region for generating light, a current confinement region disposed on the side opposite to the semiconductor substrate relative to the active region, an optical cavity comprising reflectors putting the active region and the current confinement region vertically therebetween in the direction of layering the semiconductor layer, a first electrode disposed on the side of the semiconductor substrate relative to the current confinement region and a second electrode disposed on the side opposite to the semiconductor layer relative to the current confinement region, and having a layered structure capable of forming 2-dimensional carriers between the current confinement region and the second electrode, in which a current flowing from the electrode to the current confinement region has a component in the horizontal direction relative to the surface of the substrate and is conducted mainly by way of the channel for the 2-dimensional carType: GrantFiled: February 20, 2001Date of Patent: February 24, 2004Assignee: Hitachi, Ltd.Inventors: Takeshi Kitatani, Masahiko Kondow, Toshiaki Tanaka
-
Publication number: 20030103516Abstract: In a surface-emitting laser comprising an active region for emitting light and upper and lower DBR's sandwiching this active region from below and above to form resonators, a plurality of selective oxidation layers having an aperture which is an unoxidized region are formed in the upper DBR, lower DBR or both of them and the aperture is made wider stepwise as it becomes farther from the active region, thereby greatly reducing the capacitance of the laser. A high-speed optical module comprising the above surface-emitting laser as a light source has high performance, long service life and is inexpensive.Type: ApplicationFiled: July 3, 2002Publication date: June 5, 2003Applicant: Hitachi, Ltd.Inventors: Takeshi Kitatani, Masahiko Kondow, Makoto Kudo, Shinichi Nakatsuka, Masahiro Aoki
-
Publication number: 20020176465Abstract: In a semiconductor laser for emitting light perpendicular to substrate crystal, including, on the substrate crystal, an active layer for generating light, a cavity structure sandwiching the active layer by reflecting mirrors so as to obtain a laser beam from the light generated from the active layer, and a regrown semiconductor layer between the active layer and one of the reflecting mirrors, a regrown interface or a face very close to the regrown interface is formed by a thin film containing dopants of high concentration. With the configuration, an adverse influence of a contamination deposit on the regrown interface is eliminated by delta-doping the regrown interface. The cost is reduced and device resistance is also reduced to 50 &OHgr; or less. Thus, an edge emitting laser (VCSEL) for realizing a optical module achieving a high speed characteristic over 10 Gb/s is obtained.Type: ApplicationFiled: May 28, 2002Publication date: November 28, 2002Applicant: Hitachi, Ltd.Inventors: Masahiko Kondow, Takeshi Kitatani, Makoto Kudo
-
Publication number: 20020075921Abstract: A surface emitting laser device comprising, on a semiconductor substrate, an active region for generating light, a current confinement region disposed on the side opposite to the semiconductor substrate relative to the active region, an optical cavity comprising reflectors putting the active region and the current confinement region vertically therebetween in the direction of layering the semiconductor layer, a first electrode disposed on the side of the semiconductor substrate relative to the current confinement region and a second electrode disposed on the side opposite to the semiconductor layer relative to the current confinement region, and having a layered structure capable of forming 2-dimensional carriers between the current confinement region and the second electrode, in which a current flowing from the electrode to the current confinement region has a component in the horizontal direction relative to the surface of the substrate and is conducted mainly by way of the channel for the 2-dimensional carType: ApplicationFiled: February 20, 2001Publication date: June 20, 2002Inventors: Takeshi Kitatani, Masahiko Kondow, Toshiaki Tanaka
-
Patent number: 5747864Abstract: A light receiving element having excellent characteristics, including high sensitivity and high response speed, can be achieved by a light element comprising unit structures each having two pn junction semiconductor layers, and a lightly doped semiconductor layer having low impurity density, lower than those of the p-type regions and the n-type regions of the two pn junction semiconductor layers, and which is sandwiched between the two pn junction semiconductor layers. The p-type regions of the pn junction semiconductor layers are disposed opposite to each other on opposite sides of the lightly doped semiconductor layer, respectively, and the n-type regions of the pn junction semiconductor layers are disposed opposite to each other on the opposite sides of the lightly doped semiconductor layer, respectively.Type: GrantFiled: July 31, 1996Date of Patent: May 5, 1998Assignee: Hitachi, Ltd.Inventors: Takeshi Kitatani, Yoshiaki Yazawa, Junko Minemura, Akira Sato, Terunori Warabisako