Patents by Inventor Takeshi Kizaki

Takeshi Kizaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190383530
    Abstract: A heat exchanger 10 to be used in a magnetic heat pump device includes: an assembly 11 which is formed by bundling wires 12; a case 13 which accommodates the assembly 11 and is provided with at least one cutout 145 or 146; and a filling portion 16 which is filled in the cutout 145 or 146, in which the wire 12 is formed of a magnetocaloric material having a magnetocaloric effect and the filling portion 16 is in close contact with an outer periphery of the assembly 11.
    Type: Application
    Filed: December 18, 2017
    Publication date: December 19, 2019
    Applicant: Fujikura Ltd.
    Inventors: Masahiro Kondo, Kohki Ishikawa, Katsuhiko Takeuchi, Takeshi Kizaki, Ryujiro Nomura
  • Publication number: 20190049158
    Abstract: [Object] To provide a wire capable of obtaining a wide temperature span. [Solving Means] An outer surface 121 of a wire 12A formed of a magnetocaloric material having a magnetocaloric effect partially has at least one of a concave portion 122 and a convex portion 123, the concave portion 122 is recessed in a radial direction of the wire 12A, and the convex portion 123 protrudes in the radial direction in a longitudinal direction of the wire 12A.
    Type: Application
    Filed: February 28, 2018
    Publication date: February 14, 2019
    Applicant: Fujikura Ltd.
    Inventors: Ryujiro Nomura, Takeshi Kizaki, Katsuhiko Takeuchi, Masahiro Kondo, Kohki Ishikawa
  • Publication number: 20180350490
    Abstract: Provided is a gadolinium wire rod including gadolinium as a main component and having a Vickers hardness (HV) 120 or less.
    Type: Application
    Filed: March 1, 2018
    Publication date: December 6, 2018
    Applicant: Fujikura Ltd.
    Inventors: Ryujiro Nomura, Takeshi Kizaki, Kota Ueno, Katsuhiko Takeuchi, Masahiro Kondo, Kohki Ishikawa
  • Publication number: 20180342337
    Abstract: Provided is a metal-covered gadolinium wire rod including: a gadolinium wire including gadolinium as a main component, as a core; and a clad layer including, as a main component, a metal other than gadolinium, the clad layer covering the periphery of the core.
    Type: Application
    Filed: March 1, 2018
    Publication date: November 29, 2018
    Applicant: Fujikura Ltd.
    Inventors: Ryujiro Nomura, Takeshi Kizaki, Kota Ueno, Katsuhiko Takeuchi, Masahiro Kondo, Kohki Ishikawa
  • Publication number: 20180283739
    Abstract: Provided is a gadolinium wire rod including gadolinium as a main component, wherein the average particle size of a segregated phase containing fluorine atom and/or chlorine atom is 2 ?m or less. The present invention can provide a gadolinium wire rod high in strength and excellent in processability.
    Type: Application
    Filed: May 29, 2017
    Publication date: October 4, 2018
    Applicant: Fujikura Ltd.
    Inventors: Ryujiro Nomura, Takeshi Kizaki, Kota Ueno, Katsuhiko Takeuchi, Masahiro Kondo, Kohki Ishikawa
  • Publication number: 20180252445
    Abstract: Provided is an MCM heat exchanger 10 including linear bodies formed of a magnetocaloric material having a magnetocaloric effect and a case 13 filled with the linear bodies, in which each of the linear bodies is a stranded wire 12 obtained by twisting at least two wires 121.
    Type: Application
    Filed: March 31, 2017
    Publication date: September 6, 2018
    Applicant: Fujikura Ltd.
    Inventors: Kota UENO, Masahiro KONDO, Ryujiro NOMURA, Takeshi KIZAKI, Kohki ISHIKAWA
  • Publication number: 20180245823
    Abstract: Provided is a heat exchanger 10 including: wires 121 formed of a magnetocaloric material having a magnetocaloric effect; and a case 13 filled with the wires 121, wherein a wire diameter of the wire 121 is smaller than 1 mm. According to the invention, it is possible to provide a heat exchanger capable of improving a heat exchange efficiency without causing an increase in size of a device.
    Type: Application
    Filed: March 31, 2017
    Publication date: August 30, 2018
    Applicant: Fujikura Ltd.
    Inventors: Kota Ueno, Katsuhiko Takeuchi, Masahiro Kondo, Ryujiro Nomura, Takeshi Kizaki, Kohki Ishikawa
  • Patent number: 9910299
    Abstract: The present invention is a crystal body configured with a crystal and having a pair of light passing surfaces which face each other and pass light and at least one side surface which connects the pair of the light passing surfaces. In the crystal body according to the present invention, a ratio B/A of a dislocation density A (number/cm2) in the light passing surfaces and a dislocation density B (number/cm2) in the side surface satisfies the following general formula.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: March 6, 2018
    Assignee: FUJIKURA, LTD.
    Inventor: Takeshi Kizaki
  • Patent number: 9349502
    Abstract: The present invention is an automotive wire provided with a conductor including at least one solid wire composed of a core and a metal film that covers the surface of the core, and an insulator that covers the conductor, wherein the core is composed of carbon steel, and the metal film has a thickness of 12.4 ?m to 29.6 ?m.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: May 24, 2016
    Assignee: FUJIKURA LTD.
    Inventor: Takeshi Kizaki
  • Publication number: 20160048039
    Abstract: The present invention is a crystal body configured with a crystal and having a pair of light passing surfaces which face each other and pass light and at least one side surface which connects the pair of the light passing surfaces. In the crystal body according to the present invention, a ratio B/A of a dislocation density A (number/cm2) in the light passing surfaces and a dislocation density B (number/cm2) in the side surface satisfies the following general formula.
    Type: Application
    Filed: October 23, 2014
    Publication date: February 18, 2016
    Applicant: FUJIKURA, LTD.
    Inventor: Takeshi KIZAKI
  • Patent number: 8841543
    Abstract: A photoelectric conversion element of the present invention includes: a first electrode being linear; a second electrode; and an electrolyte. The first electrode and the second electrode are disposed via the electrolyte. The first electrode includes a first linear material which includes a copper wire and a metal coating which coats the copper wire and a dye-carrying porous oxide semiconductor layer disposed on an outer circumference of the first linear material.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: September 23, 2014
    Assignee: Fujikura Ltd.
    Inventors: Takeshi Kizaki, Nobuo Tanabe, Takayuki Kitamura
  • Publication number: 20110073170
    Abstract: A photoelectric conversion element of the present invention includes: a first electrode being linear; a second electrode; and an electrolyte. The first electrode and the second electrode are disposed via the electrolyte. The first electrode includes a first linear material which includes a copper wire and a metal coating which coats the copper wire and a dye-carrying porous oxide semiconductor layer disposed on an outer circumference of the first linear material.
    Type: Application
    Filed: December 3, 2010
    Publication date: March 31, 2011
    Applicant: FUJIKURA LTD.
    Inventors: Takeshi KIZAKI, Nobuo TANABE, Takayuki KITAMURA
  • Patent number: 5805513
    Abstract: A semiconductor memory device is provided which includes a substrate arrangement which is suitable for forming a large number of types of DRAMs having different package specifications, different bit structure and different operating modes. In conjunction with this, the bonding pads are arranged at optimum locations for accommodating the different package types. Various layout arrangements are also provided to minimize space and to improve access time. Additional features are provided, including improved output buffer circuitry, protection circuitry and testing methods to facilitate operation of the semiconductor memory device.
    Type: Grant
    Filed: May 2, 1995
    Date of Patent: September 8, 1998
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Yasushi Takahashi, Hidetoshi Iwai, Satoshi Oguchi, Hisashi Nakamura, Hiroyuki Uchiyama, Toshitugu Takekuma, Shigetoshi Sakomura, Kazuyuki Miyazawa, Masamichi Ishihara, Ryoichi Hori, Takeshi Kizaki, Yoshihisa Koyama, Haruo Ii, Masaya Muranaka, Hidetomo Aoyagi, Hiromi Matsuura
  • Patent number: 5426613
    Abstract: A semiconductor memory device is provided which includes a substrate arrangement which is suitable for forming a large number of types of DRAMs having different package specifications, different bit structure and different operating modes. In conjunction with this, the bonding pads are arranged at optimum locations for accommodating the different package types. Various layout arrangements are also provided to minimize space and to improve access time. Additional features are provided, including improved output buffer circuitry, protection circuitry and testing methods to facilitate operation of the semiconductor memory device.
    Type: Grant
    Filed: November 6, 1992
    Date of Patent: June 20, 1995
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Yasushi Takahashi, Hidetoshi Iwai, Satoshi Oguchi, Hisashi Nakamura, Hiroyuki Uchiyama, Toshitugu Takekuma, Shigetoshi Sakomura, Kazuyuki Miyazawa, Masamichi Ishihara, Ryoichi Hori, Takeshi Kizaki, Yoshihisa Koyama, Haruo Ii, Masaya Muranaka, Hidetomo Aoyagi, Hiromi Matsuura
  • Patent number: 5217917
    Abstract: A semiconductor memory device is provided which includes a substrate arrangement which is suitable for forming a large number of types of DRAMs having different package specifications, different bit structure and different operating modes. In conjunction with this, the bonding pads are arranged at optimum locations for accommodating the different package types. Various layout arrangements are also provided to minimize space and to improve access time. Additional features are provided, including improved output buffer circuitry, protection circuitry and testing methods to facilitate operation of the semiconductor memory device.
    Type: Grant
    Filed: March 20, 1990
    Date of Patent: June 8, 1993
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Yasushi Takahashi, Hidetoshi Iwai, Satoshi Oguchi, Hisashi Nakamura, Hiroyuki Uchiyama, Toshitugu Takemuma, Shigetoshi Sakomura, Kazuyuki Miyazawa, Masamichi Ishihara, Ryoichi Hori, Takeshi Kizaki, Yoshihisa Koyama, Haruo Ii, Masaya Muranaka, Hidetomo Aoyagi, Hiromi Matsuura