Patents by Inventor Takeshi Omaru

Takeshi Omaru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11854950
    Abstract: The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which the lead frame does not exist, and the second joining structure includes a void part as a part at which the lead frame does not exist. Each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other assuming that the first joining structure and the second joining structure are overlapped.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: December 26, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideo Komo, Arata Iizuka, Takeshi Omaru
  • Patent number: 11764126
    Abstract: An object of the present invention is to provide a semiconductor device whose surfaces on both sides can be cooled and which has a function of insulating, on both the surfaces, the internal structure of a semiconductor package from the outside. The semiconductor device includes a first semiconductor package and a second semiconductor package. The second semiconductor package is joined on the first semiconductor package in such a manner that a first exposed surface of the first semiconductor package and a fourth exposed surface of the second semiconductor package are connected so as to face each other, and a second exposed surface of the first semiconductor package and a third exposed surface of the second semiconductor package are connected so as to face each other.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: September 19, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideo Komo, Takeshi Omaru, Takuya Tsuru
  • Patent number: 11621213
    Abstract: An object of the present invention is to provide a semiconductor device in which the effect of dimensional tolerance can be reduced, and a method for manufacturing the same. The semiconductor device according to the present invention includes: a plurality of cooling plates each having a coolant passage inside; spacers disposed to stack the cooling plates with spaces; at least one semiconductor package disposed on at least one principal surface of at least one of the cooling plates; and a spring plate disposed between adjacent ones of the cooling plates, the spring plate biasing the at least one semiconductor package toward the cooling plates.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: April 4, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideo Komo, Takaaki Shirasawa, Shintaro Araki, Nobuyoshi Kimoto, Takeshi Omaru
  • Publication number: 20210398885
    Abstract: The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which the lead frame does not exist, and the second joining structure includes a void part as a part at which the lead frame does not exist. Each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other assuming that the first joining structure and the second joining structure are overlapped.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideo KOMO, Arata IIZUKA, Takeshi OMARU
  • Publication number: 20210343623
    Abstract: An object of the present invention is to provide a semiconductor device whose surfaces on both sides can be cooled and which has a function of insulating, on both the surfaces, the internal structure of a semiconductor package from the outside. The semiconductor device includes a first semiconductor package and a second semiconductor package. The second semiconductor package is joined on the first semiconductor package in such a manner that a first exposed surface of the first semiconductor package and a fourth exposed surface of the second semiconductor package are connected so as to face each other, and a second exposed surface of the first semiconductor package and a third exposed surface of the second semiconductor package are connected so as to face each other.
    Type: Application
    Filed: November 12, 2018
    Publication date: November 4, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideo KOMO, Takeshi OMARU, Takuya TSURU
  • Patent number: 11152287
    Abstract: The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which the lead frame does not exist, and the second joining structure includes a void part as a part at which the lead frame does not exist. Each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other assuming that the first joining structure and the second joining structure are overlapped.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: October 19, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideo Komo, Arata Iizuka, Takeshi Omaru
  • Publication number: 20200286811
    Abstract: An object of the present invention is to provide a semiconductor device in which the effect of dimensional tolerance can be reduced, and a method for manufacturing the same. The semiconductor device according to the present invention includes: a plurality of cooling plates each having a coolant passage inside; spacers disposed to stack the cooling plates with spaces; at least one semiconductor package disposed on at least one principal surface of at least one of the cooling plates; and a spring plate disposed between adjacent ones of the cooling plates, the spring plate biasing the at least one semiconductor package toward the cooling plates.
    Type: Application
    Filed: December 1, 2017
    Publication date: September 10, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideo KOMO, Takaaki SHIRASAWA, Shintaro ARAKI, Nobuyoshi KIMOTO, Takeshi OMARU
  • Patent number: 10734990
    Abstract: A current detection circuit (4) detects a device current flowing in the semiconductor device (1). A voltage detection circuit (5) detects a device voltage applied to the semiconductor device (1). A temperature calculation device (6) has a table collecting device temperatures of the semiconductor device (1) respectively corresponding to plural collector currents and plural collector voltages, and reads out a device temperature corresponding to the device current detected by the current detection circuit (4) and the device voltage detected by the voltage detection circuit (5) from the table.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: August 4, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideo Komo, Shoji Saito, Takeshi Omaru
  • Patent number: 10505518
    Abstract: First and second circuits, a photocoupler and a substrate temperature monitor circuit are formed on a substrate. A photocoupler includes a primary-side light emitting diode that converts an electric signal received from the first circuit into an optical signal, and a light receiving device that converts the optical signal into an electric signal and outputs the electric signal to the second circuit. The substrate temperature monitor circuit reads a Vf voltage value of the primary-side light emitting diode of the photocoupler to monitor temperature of the substrate.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: December 10, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideo Komo, Koichi Taguchi, Takeshi Omaru
  • Publication number: 20190252300
    Abstract: The present invention is intended to provide a semiconductor module and a semiconductor device that are compatible with various rated currents. A semiconductor module includes a lead frame, and a semiconductor element joined with the lead frame. The lead frame includes a first joining structure and a second joining structure. The first joining structure includes a void part as a part at which the lead frame does not exist, and the second joining structure includes a void part as a part at which the lead frame does not exist. Each of the first joining structure and the second joining structure has a shape such that one of the first joining structure and the second joining structure complements at least part of the void part of the other assuming that the first joining structure and the second joining structure are overlapped.
    Type: Application
    Filed: November 8, 2016
    Publication date: August 15, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideo KOMO, Arata IIZUKA, Takeshi OMARU
  • Publication number: 20180219543
    Abstract: A current detection circuit (4) detects a device current flowing in the semiconductor device (1). A voltage detection circuit (5) detects a device voltage applied to the semiconductor device (1). A temperature calculation device (6) has a table collecting device temperatures of the semiconductor device (1) respectively corresponding to plural collector currents and plural collector voltages, and reads out a device temperature corresponding to the device current detected by the current detection circuit (4) and the device voltage detected by the voltage detection circuit (5) from the table.
    Type: Application
    Filed: January 8, 2016
    Publication date: August 2, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideo KOMO, Shoji SAITO, Takeshi OMARU
  • Publication number: 20170317664
    Abstract: First and second circuits, a photocoupler and a substrate temperature monitor circuit are formed on a substrate. A photocoupler includes a primary-side light emitting diode that converts an electric signal received from the first circuit into an optical signal, and a light receiving device that converts the optical signal into an electric signal and outputs the electric signal to the second circuit. The substrate temperature monitor circuit reads a Vf voltage value of the primary-side light emitting diode of the photocoupler to monitor temperature of the substrate.
    Type: Application
    Filed: January 20, 2015
    Publication date: November 2, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideo KOMO, Koichi TAGUCHI, Takeshi OMARU
  • Patent number: 9508700
    Abstract: The present invention relates to a semiconductor device used in power equipment. The semiconductor device includes: a base plate; an insulating substrate mounted on the base plate; a power switching element bonded to the insulating substrate with a solder layer; and the base plate, the insulating substrate, and the power switching element forming a module, a control substrate located above the module. The control substrate includes a variable gate voltage circuit measuring a collector-emitter voltage of the power switching element and changing a gate voltage such that the power switching element is supplied with given target power determined by a product of the collector-emitter voltage and a collector current.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: November 29, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Hideo Komo, Takeshi Omaru, Shoji Saito
  • Publication number: 20160233202
    Abstract: The present invention relates to a semiconductor device used in power equipment. The semiconductor device includes: a base plate; an insulating substrate mounted on the base plate; a power switching element bonded to the insulating substrate with a solder layer; and the base plate, the insulating substrate, and the power switching element forming a module, a control substrate located above the module. The control substrate includes a variable gate voltage circuit measuring a collector-emitter voltage of the power switching element and changing a gate voltage such that the power switching element is supplied with given target power determined by a product of the collector-emitter voltage and a collector current.
    Type: Application
    Filed: December 4, 2013
    Publication date: August 11, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hideo KOMO, Takeshi OMARU, Shoji SAITO
  • Patent number: 8027132
    Abstract: A failure detection device detects the voltage across the main electrodes of an IGBT via a diode. The failure detection device determines occurrence of short-circuit failure in the IGBT when the anode voltage of the diode is lower than a first predetermined reference voltage. Determination can be made, excluding the case of a proper operation corresponding to a flywheel diode in an ON state, preferably together with the condition that the anode voltage of the diode is higher than a second predetermined reference voltage.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: September 27, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventor: Takeshi Omaru
  • Patent number: 7830196
    Abstract: When an insulated gate bipolar transistor turned on starts to transition to turn off, the insulated gate bipolar transistor has between the emitter and the collector a surge voltage caused in proportion to the magnitude of a current gradient provided when a current flowing through a coil in switching is interrupted and an electrode interconnect inductance internal to an inverter circuit. A MOS transistor is temporarily turned on within a period of time for which the insulated gate bipolar transistor turned on transitions to turn off. This can bypass a portion of the current to the MOS transistor. This can provide an alleviated apparent current gradient of the current and thus alleviate or prevent a surge voltage caused at the insulated gate bipolar transistor.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: November 9, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventor: Takeshi Omaru
  • Publication number: 20090160476
    Abstract: A failure detection device detects the voltage across the main electrodes of an IGBT via a diode. The failure detection device determines occurrence of short-circuit failure in the IGBT when the anode voltage of the diode is lower than a first predetermined reference voltage. Determination can be made, excluding the case of a proper operation corresponding to a flywheel diode in an ON state, preferably together with the condition that the anode voltage of the diode is higher than a second predetermined reference voltage.
    Type: Application
    Filed: May 27, 2008
    Publication date: June 25, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Takeshi Omaru
  • Publication number: 20080074816
    Abstract: When an insulated gate bipolar transistor turned on starts to transition to turn off, the insulated gate bipolar transistor has between the emitter and the collector a surge voltage caused in proportion to the magnitude of a current gradient provided when a current flowing through a coil in switching is interrupted and an electrode interconnect inductance internal to an inverter circuit. A MOS transistor is temporarily turned on within a period of time for which the insulated gate bipolar transistor turned on transitions to turn off. This can bypass a portion of the current to the MOS transistor. This can provide an alleviated apparent current gradient of the current and thus alleviate or prevent a surge voltage caused at the insulated gate bipolar transistor.
    Type: Application
    Filed: January 24, 2007
    Publication date: March 27, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Takeshi Omaru