Abstract: According to one embodiment, a memory controller comprises a counter and a setting module. The counter is configured to count the number of valid pages in a block includes a page to be invalidated, when data is written in a nonvolatile memory. The setting module is configured to set the block as an object of compaction when the number of valid pages counted by the counter is smaller than a predetermined number.

Abstract: According to one embodiment, a memory controller comprises a counter and a setting module. The counter is configured to count the number of valid pages in a block includes a page to be invalidated, when data is written in a nonvolatile memory. The setting module is configured to set the block as an object of compaction when the number of valid pages counted by the counter is smaller than a predetermined number.

Abstract: According to one embodiment, an imaging apparatus is provided with a recording module which records image data, a communication module which transits the image data to an external recording apparatus for backup, a preparing module which prepares a management list where information indicating whether the image data has been backed up and information indicating whether overwriting can be performed on a recording region on the recording module are caused to correspond to the image data, and a display module which displays the prepared management list.

Abstract: According to one embodiment, a camera apparatus includes a storage device and a data transfer module. The storage device is configured to store the image data, an operating system for activating an external apparatus, and a second image edit program configured to run on the operating system. The data transfer module is configured to transfer the operating system to the external apparatus in accordance with a first read request from the external apparatus, and to transfer the second image edit program to the external apparatus in accordance with a second read request, the second read request being sent from the operating system after the operating system is booted on the external apparatus.

Abstract: According to one embodiment, an I/O controller transfers data between a memory and an I/O device by request of a processor. The I/O controller includes a storage unit to which write access is gained by the processor and which stores descriptor chain information written by the processor, the descriptor chain information including a plurality of descriptors each describing a content of data transfer to be executed, and a data transfer control unit which processes the descriptors in sequence and executes a series of data transfers by direct memory access to transfer data from the memory to the I/O device.

Abstract: An SD memory card host controller supplies a clock to an SD memory card and issues a read command. After that, the host controller stops supplying the clock to the SD memory card during latency of read data from receipt of a response to the read command from the SD memory card to readout of data. The host controller resumes supplying the clock immediately before a data cycle starts. Power savings can thus be achieved by controlling the clock to be supplied to the SD memory card.

Abstract: A system includes a first sensor, a second sensor and a third sensor, each of the sensors being configured to detect a distance from each of electronic devices that are present in a space and an identifier of each of the electronic devices by using a wireless signal, and a host apparatus that executes communication with each of the sensors, the host apparatus including a detection unit that detects a position of each of the electronic devices in the space, based on the distance from each of the electronic devices and a position of each of the first sensor, second sensor and third sensor in the space, and a unit that acquires shape information representative of a shape of each of the electronic devices from each of the electronic devices, by executing wireless communication with each of the electronic devices using the identifier of each of the electronic devices.

Abstract: An SD memory card host controller supplies a clock to an SD memory card and issues a read command. After that, the host controller stops supplying the clock to the SD memory card during latency of read data from receipt of a response to the read command from the SD memory card to readout of data. The host controller resumes supplying the clock immediately before a data cycle starts. Power savings can thus be achieved by controlling the clock to be supplied to the SD memory card.

Abstract: In a computer system where a plurality of bus masters are connected to a bus, a bus arbiter connected to the bus, comprises an arbitration circuit that arbitrates between the bus access request signals from the plurality of bus masters and outputs a bus access grant signal to a single bus master of the plurality of bus masters, unit for holding a value indicating the duration during which the switching of the bus access grant signal is to be inhibited, counting unit capable of counting on the basis of the value held in the holding unit, unit for causing the counting unit to start counting at the time when the arbitration circuit has given a bus access grant signal to a bus master, unit for inhibiting the arbitration circuit from switching the bus access grant signal in the period until the counting has been completed, as long as the bus access request signal from the bus master to which the bus access grant signal has been given remains active, and unit for permitting the arbitration circuit to switch the acc