Abstract: Provided is a composite material suitable for forming a part for continuous casting capable of producing cast materials of excellent surface quality for a long period of time and with which a molten metal is inhibited from flowing into a gap between a nozzle and a moving mold. A composite material (nozzle 1) includes a porous body 2 having a large number of pores and a filler incorporated in at least part of a portion that comes into contact with the molten metal, the portion being part of a surface portion of the porous body. The filler incorporated in the porous body 2 is at least one selected from a nitride, a carbide, and carbon.

Abstract: A semiconductor element includes a drain layer, a drift region selectively provided in the drain layer, a base region selectively provided in the drift region, a source region selectively provided in the base region, first and/or second metal layers selectively provided in at least one of the source region and the drain layer from the front surface to the inside of at least one of the source region and the drain layer, a gate electrode in a trench shape extending in a direction substantially parallel to the front surface of the drain layer from a part of the source region through the base region adjacent to at least the part of the source region to a part of the drift region, a source electrode connected to the first metal layer, and a drain electrode connected to the drain layer or the second metal layer.

Abstract: A coil material capable of contributing to an improvement of the productivity of a high-strength magnesium alloy sheet and a method for manufacturing the coil material are provided. Regarding the method for manufacturing a coil material through coiling of a sheet material formed from a metal into the shape of a cylinder, so as to produce the coil material, the sheet material is a cast material of a magnesium alloy discharged from a continuous casting machine and the thickness t (mm) thereof is 7 mm or less. The sheet material 1 is coiled with a coiler while the temperature T (° C.) of the sheet material 1 just before coiling is controlled to be a temperature at which the surface strain ((t/R)×100) represented by the thickness t and the bending radius R (mm) of the sheet material 1 becomes less than or equal to the elongation at room temperature of the sheet material 1.

Abstract: According to one embodiment, a semiconductor device includes a drift region of a first conductivity type, a base region of a second conductivity type, a source region of the first conductivity type, a gate electrode in a trench shape, a contact region of the second conductivity type, a drain electrode, and a source electrode. The drift region is selectively provided in a drain layer of the first conductivity type from a surface of the drain layer to an inside of the drain layer. The base region is selectively provided in the drift region from a surface of the drift region to an inside of the drift region. The source region is selectively provided in the base region from a surface of the base region to an inside of the base region. The gate electrode penetrates from a part of the source region through the base region adjacent to the part of the source region to reach a part of the drift region in a direction substantially parallel to a major surface of the drain layer.

Abstract: There is provided a semiconductor device comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided on the first semiconductor layer of the first conductivity type; a semiconductor region of the first conductivity type selectively provided on a front surface portion of the second semiconductor layer of the second conductivity type; a first main electrode provided in contact with a surface of the semiconductor region; a second main electrode provided on a side of the first semiconductor layer of the first conductivity type, the side being opposite to the surface on which the second semiconductor layer of the second conductivity type is provided; a gate wiring provided on the second semiconductor layer of the second conductivity type around an element region in which the semiconductor region is provided; a trench penetrating the second semiconductor layer of the second conductivity type to reach the first semiconductor layer of the f

Abstract: In various aspects, a MOSFET may include an active region of a first conductivity type provided on an insulating layer, the active region having a first portion and a second portion, the first portion being thicker than the second portion; a base region of the first conductivity type provided on the insulating layer, the base region having a higher impurity concentration than the first portion of the active region, the base region being in contact with the first portion of the active region and the insulating layer; a drain region of a second conductivity type provided on the insulating layer, the drain region being in contact with the second portion of the active region and the insulating layer, the drain region being spaced from the base region; a source region of the second conductivity type provided on a surface of the base region; a gate insulating layer provided on the source region, the base region, the active region and the drain region; and a gate electrode provided on the gate insulating layer.

Abstract: There is provided a semiconductor device comprising: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided on the first semiconductor layer of the first conductivity type; a semiconductor region of the first conductivity type selectively provided on a front surface portion of the second semiconductor layer of the second conductivity type; a first main electrode provided in contact with a surface of the semiconductor region; a second main electrode provided on a side of the first semiconductor layer of the first conductivity type, the side being opposite to the surface on which the second semiconductor layer of the second conductivity type is provided; a gate wiring provided on the second semiconductor layer of the second conductivity type around an element region in which the semiconductor region is provided; a trench penetrating the second semiconductor layer of the second conductivity type to reach the first semiconductor layer of the f

Abstract: In various aspects, an optical coupling device may include a light emitting element configured to emit an optical signal; a photo receiving element having a serial connected of photo diodes, the photo receiving element configured to receive the optical signal and generate an electrical signal; and a control circuit having an active element, a source and a drain of the active element connected to both ends of the photo receiving element; wherein the breakdown voltage of the control circuit is no more than an open circuit voltage of the photo receiving element.

Abstract: In various aspects, a MOSFET may include a semiconductor region of a first conductivity type; a first semiconductor region of a second conductivity type provided in the semiconductor region; a second semiconductor region of the first conductivity type provided in the semiconductor region, the second semiconductor region having a higher impurity concentration than the semiconductor region; a third semiconductor region of the second conductivity type provided on the second semiconductor region; a fourth semiconductor region of the second conductivity type configured to be contact with the first semiconductor region and the third semiconductor region, the fourth semiconductor region having a lower impurity concentration than the first semiconductor region and the third semiconductor region; a gate electrode provided on the fourth semiconductor region via a gate insulating layer, an edge of the gate electrode spaced from a junction between the first semiconductor region and the fourth semiconductor region.

Abstract: In various aspects, a MOSFET may include an active region of a first conductivity type provided on an insulating layer, the active region having a first portion and a second portion, the first portion being thicker than the second portion; a base region of the first conductivity type provided on the insulating layer, the base region having a higher impurity concentration than the first portion of the active region, the base region being in contact with the first portion of the active region and the insulating layer; a drain region of a second conductivity type provided on the insulating layer, the drain region being in contact with the second portion of the active region and the insulating layer, the drain region being spaced from the base region; a source region of the second conductivity type provided on a surface of the base region; a gate insulating layer provided on the source region, the base region, the active region and the drain region; and a gate electrode provided on the gate insulating layer.

Abstract: According to the present invention, there is provided a semiconductor device having, a semiconductor substrate having a surface on which an insulating layer is formed, a first-conductivity-type first semiconductor layer formed on the insulating layer and having a first impurity concentration, a first-conductivity-type second semiconductor region formed in the first semiconductor layer from a surface of the first semiconductor layer to a surface of the insulating layer, and having a concentration higher than the first impurity concentration, a second-conductivity-type third semiconductor region formed in the first semiconductor layer from the surface of the first semiconductor layer to the surface of the insulating layer with a predetermined distance between the second and third semiconductor regions, and having a second impurity concentration, a second-conductivity-type fourth semiconductor region formed in a surface portion of the second semiconductor region, and having a concentration higher than the second

Abstract: According to the present invention, there is provided a semiconductor device having, a semiconductor substrate having a surface on which an insulating layer is formed, a first-conductivity-type first semiconductor layer formed on the insulating layer and having a first impurity concentration, a first-conductivity-type second semiconductor region formed in the first semiconductor layer from a surface of the first semiconductor layer to a surface of the insulating layer, and having a concentration higher than the first impurity concentration, a second-conductivity-type third semiconductor region formed in the first semiconductor layer from the surface of the first semiconductor layer to the surface of the insulating layer with a predetermined distance between the second and third semiconductor regions, and having a second impurity concentration, a second-conductivity-type fourth semiconductor region formed in a surface portion of the second semiconductor region, and having a concentration higher than the second