Patents by Inventor Takeshi Yado

Takeshi Yado has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9880572
    Abstract: A semiconductor integrated circuit, supplied with a power source voltage generated by a power supplier and having a level determined in accordance with an analog signal, includes: an output unit outputting, as the analog signal, an output voltage signal indicating the power source voltage; an input unit including an input interface identical in specifications to an output interface of the output unit, and receiving an input signal indicating a voltage and input from an outside of the semiconductor integrated circuit; and a voltage control circuit generating the output voltage signal, based on the input signal and operating voltage information indicating a voltage required for an operation of the semiconductor integrated circuit.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: January 30, 2018
    Assignee: SOCIONEXT INC.
    Inventors: Yoshinori Okajima, Takahiro Ichinomiya, Kazuhisa Tanaka, Masayuki Taniyama, Hidemi Harayama, Takeshi Yado
  • Publication number: 20170336816
    Abstract: A semiconductor integrated circuit, supplied with a power source voltage generated by a power supplier and having a level determined in accordance with an analog signal, includes: an output unit outputting, as the analog signal, an output voltage signal indicating the power source voltage; an input unit including an input interface identical in specifications to an output interface of the output unit, and receiving an input signal indicating a voltage and input from an outside of the semiconductor integrated circuit; and a voltage control circuit generating the output voltage signal, based on the input signal and operating voltage information indicating a voltage required for an operation of the semiconductor integrated circuit.
    Type: Application
    Filed: August 9, 2017
    Publication date: November 23, 2017
    Inventors: Yoshinori OKAJIMA, Takahiro ICHINOMIYA, Kazuhisa TANAKA, Masayuki TANIYAMA, Hidemi HARAYAMA, Takeshi YADO
  • Patent number: 9766640
    Abstract: A semiconductor integrated circuit, supplied with a power source voltage generated by a power supplier and having a level determined in accordance with an analog signal, includes: an output unit outputting, as the analog signal, an output voltage signal indicating the power source voltage; an input unit including an input interface identical in specifications to an output interface of the output unit, and receiving an input signal indicating a voltage and input from an outside of the semiconductor integrated circuit; and a voltage control circuit generating the output voltage signal, based on the input signal and operating voltage information indicating a voltage required for an operation of the semiconductor integrated circuit.
    Type: Grant
    Filed: February 25, 2016
    Date of Patent: September 19, 2017
    Assignee: SOCIONEXT INC.
    Inventors: Yoshinori Okajima, Takahiro Ichinomiya, Kazuhisa Tanaka, Masayuki Taniyama, Hidemi Harayama, Takeshi Yado
  • Publication number: 20160179111
    Abstract: A semiconductor integrated circuit, supplied with a power source voltage generated by a power supplier and having a level determined in accordance with an analog signal, includes: an output unit outputting, as the analog signal, an output voltage signal indicating the power source voltage; an input unit including an input interface identical in specifications to an output interface of the output unit, and receiving an input signal indicating a voltage and input from an outside of the semiconductor integrated circuit; and a voltage control circuit generating the output voltage signal, based on the input signal and operating voltage information indicating a voltage required for an operation of the semiconductor integrated circuit.
    Type: Application
    Filed: February 25, 2016
    Publication date: June 23, 2016
    Inventors: Yoshinori OKAJIMA, Takahiro ICHINOMIYA, Kazuhisa TANAKA, Masayuki TANIYAMA, Hidemi HARAYAMA, Takeshi YADO
  • Patent number: 8644687
    Abstract: In a recording apparatus (camcorders, optical disc recorders, etc.), the operator presses down priority designating buttons for designating priorities when recording input image data. An additional information generating section records and holds, in a storage section, additional information indicating priorities of data to be recorded (e.g., “low”, “intermediate”, “high”, or “highest”) which are set, depending on what priority designating button has been pressed down. If recordable remaining space in the storage section detected by the remaining amount detecting section falls below a predetermined value before the start of or during recording of data, a control section overwrites regions in order of priority of data which is stored therein, the lowest first, with data which is about to be recorded or is being recorded, based on the additional information generated by the additional information generating section.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: February 4, 2014
    Assignee: Panasonic Corporation
    Inventors: Masao Kitagawa, Masaru Iwasa, Takeshi Yado
  • Publication number: 20110280318
    Abstract: A multiview video decoding apparatus which sufficiently suppresses artifact in a decoded image even when an error occurs in the to-be-decoded image. It decodes a video stream including first coded video information of a first viewpoint and second coded video information of a second viewpoint, and includes: a decoding unit which decodes the video stream; and an error detecting unit which detects an error in the video stream; and an error concealing unit which conceals the error and includes (i) a decoding control unit which, when the error is in first coded image information in the first coded video information, causes said decoding unit to decode second coded image information included in the second coded video information and to be decoded after the first coded image information and (ii) a concealment processing unit which conceals the detected error, using decoded image information generated by decoding the second coded image information.
    Type: Application
    Filed: July 27, 2011
    Publication date: November 17, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Takeshi YADO, Yuya SHIGENOBU
  • Publication number: 20080212421
    Abstract: In a recording apparatus (camcorders, optical disc recorders, etc.), the operator presses down priority designating buttons for designating priorities when recording input image data. An additional information generating section records and holds, in a storage section, additional information indicating priorities of data to be recorded (e.g., “low”, “intermediate”, “high”, or “highest”) which are set, depending on what priority designating button has been pressed down. If recordable remaining space in the storage section detected by the remaining amount detecting section falls below a predetermined value before the start of or during recording of data, a control section overwrites regions in order of priority of data which is stored therein, the lowest first, with data which is about to be recorded or is being recorded, based on the additional information generated by the additional information generating section.
    Type: Application
    Filed: February 20, 2008
    Publication date: September 4, 2008
    Inventors: Masao KITAGAWA, Masaru Iwasa, Takeshi Yado