Patents by Inventor Taketoshi Tanaka
Taketoshi Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200365694Abstract: A nitride semiconductor device includes a first impurity layer made of an Al1-XGaXN (0<X?1) based material and containing a first impurity with which a depth of an acceptor level from a valence band (ET-EV) is made not less than 0.3 eV but less than 0.6 eV, an electron transit layer formed on the first impurity layer, an electron supply layer formed on the electron transit layer, agate electrode formed on the electron transit layer, and a source electrode and a drain electrode formed such that the source electrode and the drain electrode sandwich the gate electrode and electrically connected to the electron supply layer.Type: ApplicationFiled: December 21, 2018Publication date: November 19, 2020Inventors: Norikazu ITO, Taketoshi TANAKA, Ken NAKAHARA
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Publication number: 20200350428Abstract: A semiconductor device (1) includes a substrate (2), an electron transit layer (4) disposed on the substrate (2), and an electron supply layer (5) disposed on the electron supply layer (4). The electron transit layer (4) includes a conductive path forming layer (43) in contact with the electron supply layer (5), a first semiconductor region (first nitride semiconductor layer) (41) containing an acceptor-type impurity, and a second semiconductor region (second nitride semiconductor layer) (42) disposed at a position closer to the conductive path forming layer (43) than the first semiconductor region (41) and containing an acceptor-type impurity. The first semiconductor region (41) has a higher acceptor density than the second semiconductor region (42).Type: ApplicationFiled: November 13, 2018Publication date: November 5, 2020Inventor: Taketoshi TANAKA
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Patent number: 10727312Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.Type: GrantFiled: May 23, 2019Date of Patent: July 28, 2020Assignee: ROHM CO., LTD.Inventors: Shinya Takado, Minoru Akutsu, Taketoshi Tanaka, Norikazu Ito
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Publication number: 20200135909Abstract: A semiconductor devices includes: a conductive substrate; an electron transit layer arranged on the conductive substrate; an electron supply layer arranged on the electron transit layer; and a source electrode, a drain electrode, and a gate electrode arranged on the electron supply layer, wherein the electron transit layer includes a nitride semiconductor layer including an acceptor type impurity, and wherein the semiconductor device has a characteristic that when a negative bias is applied to the conductive substrate, a source-drain resistance decreases over time.Type: ApplicationFiled: October 28, 2019Publication date: April 30, 2020Inventor: Taketoshi TANAKA
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Patent number: 10636884Abstract: A nitride semiconductor device includes a silicon substrate. A nitride semiconductor layer is formed over the silicon substrate. A gate electrode is formed over the nitride semiconductor layer so as to have a first ring-shaped portion and a second ring-shaped portion connected to the first ring-shaped portion. A first finger electrode is surrounded by the first ring-shaped portion. A second finger electrode is surrounded by the second ring-shaped portion. A third finger electrode is interposed between the first ring-shaped portion and the second ring-shaped portion.Type: GrantFiled: August 20, 2019Date of Patent: April 28, 2020Assignee: ROHM CO., LTD.Inventor: Taketoshi Tanaka
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Publication number: 20190371897Abstract: A nitride semiconductor device includes a silicon substrate. A nitride semiconductor layer is formed over the silicon substrate. A gate electrode is formed over the nitride semiconductor layer so as to have a first ring-shaped portion and a second ring-shaped portion connected to the first ring-shaped portion. A first finger electrode is surrounded by the first ring-shaped portion. A second finger electrode is surrounded by the second ring-shaped portion. A third finger electrode is interposed between the first ring-shaped portion and the second ring-shaped portion.Type: ApplicationFiled: August 20, 2019Publication date: December 5, 2019Inventor: Taketoshi TANAKA
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Publication number: 20190280101Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.Type: ApplicationFiled: May 23, 2019Publication date: September 12, 2019Applicant: ROHM CO., LTD.Inventors: Shinya TAKADO, Minoru AKUTSU, Taketoshi TANAKA, Norikazu ITO
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Publication number: 20190267483Abstract: Provided is a nitride semiconductor device 3 including GaN electron transit layer 13, an electron supply layer 14 in contact with the electron transit layer 13, a gate layer 15, formed selectively on the electron supply layer 14 and constituted of a nitride semiconductor composition, effectively not containing an acceptor type impurity, and a gate electrode 16, formed on the gate lever 15, and sating the following formula (1): d G ? 2 ? E F ? q ? ( N DA + N A - N DD - N D ) ? 0 ? ? C + ? B - d B ? P ? 0 ? ? B > 0 ( 1 )Type: ApplicationFiled: May 7, 2019Publication date: August 29, 2019Inventor: Taketoshi TANAKA
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Patent number: 10388744Abstract: A nitride semiconductor device includes a silicon substrate. A nitride semiconductor layer is formed over the silicon substrate. A gate electrode is formed over the nitride semiconductor layer so as to have a first ring-shaped portion and a second ring-shaped portion connected to the first ring-shaped portion. A first finger electrode is surrounded by the first ring-shaped portion. A second finger electrode is surrounded by the second ring-shaped portion. A third finger electrode is interposed between the first ring-shaped portion and the second ring-shaped portion.Type: GrantFiled: June 29, 2018Date of Patent: August 20, 2019Assignee: ROHM CO., LTD.Inventor: Taketoshi Tanaka
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Publication number: 20190237551Abstract: A nitride semiconductor device 1 includes a first nitride semiconductor layer 4, constituting an electron transit layer, a second nitride semiconductor layer 5, formed on the first nitride semiconductor layer 4and constituting an electron supply layer, a nitride semiconductor gate layer 6, disposed on the second nitride semiconductor layer 5 and containing an acceptor type impurity, a metal film 7, formed on the nitride semiconductor gate layer 6, and a gate pad 23, connected to the metal film 7 via a gate insulating film 8 having a first surface and a second surface, the first surface of the gate insulating film 8 is electrically connected directly or via a metal to the metal film 7, and the second surface of the gate insulating film 8 is electrically connected directly or via a metal to the gate pad 23.Type: ApplicationFiled: January 16, 2019Publication date: August 1, 2019Inventor: Taketoshi TANAKA
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Patent number: 10340360Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.Type: GrantFiled: February 26, 2018Date of Patent: July 2, 2019Assignee: ROHM CO., LTD.Inventors: Shinya Takado, Minoru Akutsu, Taketoshi Tanaka, Norikazu Ito
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Patent number: 10283632Abstract: A nitride semiconductor device includes: an electron transit layer formed of GaN; an electron supply layer formed on the electron transit layer and to which tensile strain is applied by the electron transit layer, the electron supply layer being formed as an AlxInyGa1-x-yN layer where 0.8?x?1.0 and 0?x+y?1; a passivation film formed on the electron supply layer and formed of SiN, the passivation film having an opening part extending to the electron supply layer; a gate electrode formed on the electron supply layer through a gate insulating film formed within the opening part; and a source electrode and a drain electrode disposed away from the gate electrode to have the gate electrode interposed therebetween, the source electrode and the drain electrode being electrically connected to the electron supply layer. A film thickness of the passivation film is 10 nm or greater.Type: GrantFiled: October 5, 2016Date of Patent: May 7, 2019Assignee: ROHM CO., LTD.Inventors: Taketoshi Tanaka, Norikazu Ito
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Publication number: 20180323267Abstract: A nitride semiconductor device includes a silicon substrate. A nitride semiconductor layer is formed over the silicon substrate. A gate electrode is formed over the nitride semiconductor layer so as to have a first ring-shaped portion and a second ring-shaped portion connected to the first ring-shaped portion. A first finger electrode is surrounded by the first ring-shaped portion. A second finger electrode is surrounded by the second ring-shaped portion. A third finger electrode is interposed between the first ring-shaped portion and the second ring-shaped portion.Type: ApplicationFiled: June 29, 2018Publication date: November 8, 2018Applicant: ROHM CO., LTD.Inventor: Taketoshi TANAKA
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Patent number: 10038064Abstract: A nitride semiconductor device includes: a nitride semiconductor layer; a gate electrode finger having at least one end portion, and extending along a surface of the nitride semiconductor layer; and a drain electrode finger having at least one end portion on the same side as that of the one end portion of the gate electrode finger, and extending along the gate electrode finger, wherein the one end portion of the drain electrode finger protrudes relative to the one end portion of the gate electrode finger.Type: GrantFiled: August 9, 2016Date of Patent: July 31, 2018Assignee: ROHM CO., LTD.Inventor: Taketoshi Tanaka
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Patent number: 10038070Abstract: A nitride semiconductor device according to the present invention includes a nitride semiconductor layer including an electron transit layer and an electron supply layer which is in contact with the electron transit layer and which has a composition different from that of the electron transit layer, a gate electrode on the nitride semiconductor layer and a gate insulating film between the gate electrode and the nitride semiconductor layer. A region whose depth is 250 nm from an interface between the gate insulating film and the gate electrode includes a region which has a deep acceptor concentration equal to or more than 1.0×1016 cm?3.Type: GrantFiled: August 9, 2016Date of Patent: July 31, 2018Assignee: ROHM CO., LTD.Inventors: Taketoshi Tanaka, Minoru Akutsu, Norikazu Ito
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Publication number: 20180190790Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.Type: ApplicationFiled: February 26, 2018Publication date: July 5, 2018Applicant: ROHM CO., LTD.Inventors: Shinya TAKADO, Minoru AKUTSU, Taketoshi TANAKA, Norikazu ITO
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Patent number: 9911868Abstract: A nitride semiconductor device includes: a conductive substrate; a first nitride semiconductor layer which is formed on the substrate and contains Ga or Al; an electron supply layer which is formed in contact with the first nitride semiconductor layer and is made of a second nitride semiconductor having a different composition from that of the first nitride semiconductor layer in an interface between the electron supply layer and the first nitride semiconductor layer; and a source, a gate and a drain or an anode and a cathode which are formed on a front surface of the substrate, wherein the first nitride semiconductor layer has a thickness of w or more, a deep acceptor concentration distribution NDA(z) and a shallow acceptor concentration distribution NA(z), which satisfy the following equations (1) to (3): ? 0 w ? { E c ? ( x ) - ? 0 w ? q ? ( N DA ? ( z ) + N A ? ( z ) ) ? 0 ? ? ? dz } ? ? dz ? ? V b ( 1 ) E c ? ( x ) = 3.Type: GrantFiled: March 24, 2016Date of Patent: March 6, 2018Assignee: ROHM CO., LTD.Inventor: Taketoshi Tanaka
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Publication number: 20180061975Abstract: Provided is a nitride semiconductor device 3 including a GaN electron transit layer 13, an AlGaN electron supply layer 14 in contact with the electron transit layer 13, a gate layer 15, formed selectively on the electron supply layer 14 and constituted of a nitride semiconductor composition effectively not containing an acceptor type impurity, and a gate electrode 16, formed on the gate layer 15, and satisfying the following formula (1): d G ? 2 ? ? E F ? q ? ( N DA + N A - N DD - N D ) ? 0 ? ? C + ? B - d B ? P ? 0 ? ? B > 0 ( 1 )Type: ApplicationFiled: August 22, 2017Publication date: March 1, 2018Inventor: Taketoshi TANAKA
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Patent number: 9905669Abstract: A nitride semiconductor device includes: an electron transit layer including GaxIn1-xN (0<x?1); an electron supply layer formed on the electron transit layer and including AlyIn1-yN (0<y?1); a gate insulating film formed to pass through the electron supply layer to contact the electron transit layer; and a gate electrode facing the electron transit layer with the gate insulating film interposed therebetween, wherein, in the electron transit layer, a portion contacting the gate insulating film and a portion contacting the electron transit layer are flush with each other.Type: GrantFiled: October 6, 2016Date of Patent: February 27, 2018Assignee: ROHM CO., LTD.Inventors: Shinya Takado, Minoru Akutsu, Taketoshi Tanaka, Norikazu Ito
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Patent number: 9871130Abstract: A nitride semiconductor device includes: a first nitride semiconductor layer serving as an electron transit layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer, the second nitride semiconductor layer having a band gap greater than that of the first nitride semiconductor layer and serving as an electron supply layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer, the third nitride semiconductor layer having a band gap greater than that of the first nitride semiconductor layer and smaller than that of the second nitride semiconductor layer; and a gate part formed on the third nitride semiconductor layer, wherein the gate part has a fourth nitride semiconductor layer formed on the third nitride semiconductor layer and includes an acceptor type impurity, and a gate electrode formed on the fourth nitride semiconductor layer.Type: GrantFiled: September 22, 2016Date of Patent: January 16, 2018Assignee: ROHM CO., LTD.Inventor: Taketoshi Tanaka