Patents by Inventor Taketoshi Yasumuro

Taketoshi Yasumuro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10719904
    Abstract: A parallel processing apparatus includes, a plurality of operational circuits that execute operations for data in parallel, and a control circuit that, upon an end of operations for a first portion of the data, finds estimated operation time for operations for a second portion that is an object of operations subsequent to the first portion, based on target time for operational processing for the data and a data amount of remaining data for which no operation has been executed in the data, finds a second parallelism of the operations for the second portion, based on a first parallelism of the operations for the first portion, a measurement value of operation time for the operations for the first portion, and the estimated operation time, and causes operational circuits, numbering in a number indicated by the second parallelism among the plurality of operational circuits, to execute the operations for the second portion.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: July 21, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Taketoshi Yasumuro, Hirotaka Fukushima
  • Publication number: 20190043157
    Abstract: A parallel processing apparatus includes, a plurality of operational circuits that execute operations for data in parallel, and a control circuit that, upon an end of operations for a first portion of the data, finds estimated operation time for operations for a second portion that is an object of operations subsequent to the first portion, based on target time for operational processing for the data and a data amount of remaining data for which no operation has been executed in the data, finds a second parallelism of the operations for the second portion, based on a first parallelism of the operations for the first portion, a measurement value of operation time for the operations for the first portion, and the estimated operation time, and causes operational circuits, numbering in a number indicated by the second parallelism among the plurality of operational circuits, to execute the operations for the second portion.
    Type: Application
    Filed: July 24, 2018
    Publication date: February 7, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Taketoshi Yasumuro, Hirotaka Fukushima
  • Patent number: 7702930
    Abstract: A control device controls a device to be on and off in response to boot data that instructs boot of the device. The control device includes a receiving unit that receives the boot data through a network; a counting unit configured to count the number of the boot data received within a predetermined time; and a control unit that controls to turn on and to turn off the device. The control device controls to turn on the device when the number of the boot data counted is “1”. The control device controls to turn off the device when the number of the boot data counted is “N”.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: April 20, 2010
    Assignee: Fujitsu Limited
    Inventor: Taketoshi Yasumuro
  • Publication number: 20060107033
    Abstract: A control device controls a device to be on and off in response to boot data that instructs boot of the device. The control device includes a receiving unit that receives the boot data through a network; a counting unit configured to count the number of the boot data received within a predetermined time; and a control unit that controls to turn on and to turn off the device. The control device controls to turn on the device when the number of the boot data counted is “1”. The control device controls to turn off the device when the number of the boot data counted is “N”.
    Type: Application
    Filed: December 19, 2005
    Publication date: May 18, 2006
    Inventor: Taketoshi Yasumuro