Patents by Inventor Takeyoshi Matsuda

Takeyoshi Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9960572
    Abstract: A semiconductor device includes a semiconductor layer formed of a III-V group semiconductor crystal containing As as a primary component of a V group. A V group element other than As has been introduced at a concentration of 0.02 to 5% into a V group site of the III-V group semiconductor crystal in the semiconductor layer.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: May 1, 2018
    Assignee: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Masayuki Iwami, Hirotatsu Ishii, Norihiro Iwai, Takeyoshi Matsuda, Akihiko Kasukawa, Takuya Ishikawa, Yasumasa Kawakita, Eisaku Kaji
  • Publication number: 20160351392
    Abstract: A semiconductor device includes a semiconductor layer formed of a III-V group semiconductor crystal containing As as a primary component of a V group. A V group element other than As has been introduced at a concentration of 0.02 to 5% into a V group site of the III-V group semiconductor crystal in the semiconductor layer.
    Type: Application
    Filed: August 12, 2016
    Publication date: December 1, 2016
    Applicant: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Masayuki IWAMI, Hirotatsu ISHII, Norihiro IWAI, Takeyoshi MATSUDA, Akihiko KASUKAWA, Takuya ISHIKAWA, Yasumasa KAWAKITA, Eisaku KAJI
  • Publication number: 20160352075
    Abstract: A semiconductor laser device includes an active layer including a well layer and a barrier layer formed of a III-V group semiconductor crystal containing As as a primary component of a V group. A V group element other than As has been introduced at a concentration of 0.02 to 5% into a V group site of the III-V group semiconductor crystal in at least one of the well layer and the barrier layer, and a III group site of the III-V group semiconductor crystal in at least one of the well layer and the barrier layer contains Al.
    Type: Application
    Filed: August 12, 2016
    Publication date: December 1, 2016
    Applicant: FURUKAWA ELECTRIC CO., LTD.
    Inventors: Masayuki IWAMI, Hirotatsu ISHII, Norihiro IWAI, Takeyoshi MATSUDA, Akihiko KASUKAWA, Takuya ISHIKAWA, Yasumasa KAWAKITA, Eisaku KAJI
  • Patent number: 6593153
    Abstract: A condenser angle of 0.5 mrad or below is set with respect to a specimen. Electron-beam diameter of 20 to 100 nm &phgr; is set onto the surface of the specimen. A flux of highly parallel electron beams is irradiated onto the specimen having a strained layer quantum well structure. An image of electrons diffracted from the specimen is recorded onto an imaging plate. The recorded image is analyzed. Lattice constants and strains of layers of the strained layer quantum well structure are measured based on a result of this analysis.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: July 15, 2003
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Takeyoshi Matsuda, Satoru Seo, Kengo Mitose
  • Publication number: 20020166965
    Abstract: A condenser angle of 0.5 mrad or below is set with respect to a specimen. Electron-beam diameter of 20 to 100 nm &phgr; is set onto the surface of the specimen. A flux of highly parallel electron beams is irradiated onto the specimen having a strained layer quantum well structure. An image of electrons diffracted from the specimen is recorded onto an imaging plate. The recorded image is analyzed. Lattice constants and strains of layers of the strained layer quantum well structure are measured based on a result of this analysis.
    Type: Application
    Filed: December 20, 2001
    Publication date: November 14, 2002
    Inventors: Takeyoshi Matsuda, Satoru Seo, Kengo Mitose