Patents by Inventor Takuji Oda
Takuji Oda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7527658Abstract: A method of manufacturing displays, includes at least forming a metal pattern on a surface of an insulating substrate, forming an insulating film on the metal pattern, forming a pattern of a photosensitive resin on the insulating film, and forming a contact hole in the insulating film with the film of a photosensitive resin used as a mask. The forming a contact hole is a dry etching method in which an electric field is generated between a pair of opposed electrodes after an insulating substrate has been mounted on one electrode that includes aluminum in at least a surface thereof. The dry etching method includes forming a contact hole in the insulating film with an outer circumferential portion, which surrounds a region on which the insulating substrate is mounted, of the one electrode covered with an insulating material.Type: GrantFiled: July 13, 2005Date of Patent: May 5, 2009Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Terushige Hino, Kazuaki Tanoue, Eiji Shibata, Takuji Oda
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Publication number: 20060014395Abstract: A method of manufacturing displays, includes at least forming a metal pattern on a surface of an insulating substrate, forming an insulating film on the metal pattern, forming a pattern of a photosensitive resin on the insulating film, and forming a contact hole in the insulating film with the film of a photosensitive resin used as a mask. The forming a contact hole is a dry etching method in which an electric field is generated between a pair of opposed electrodes after an insulating substrate has been mounted on one electrode that includes aluminum in at least a surface thereof. The dry etching method includes forming a contact hole in the insulating film with an outer circumferential portion, which surrounds a region on which the insulating substrate is mounted, of the one electrode covered with an insulating material.Type: ApplicationFiled: July 13, 2005Publication date: January 19, 2006Applicant: MITSUBISHI DENKI KABUSHIKI KAISHAInventors: Terushige Hino, Kazuaki Tanoue, Eiji Shibata, Takuji Oda
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Patent number: 6461977Abstract: An improved etching method allowing the formation of a silicon nitride film with an adequate film thickness at the sidewall portion of a pattern is disclosed. A silicon nitride film formed to cover a stepped pattern is dry-etched, employing plasma of mixed gases containing CH2F2 and O2. As a result, a sidewall spacer of the silicon nitride film is formed at the sidewall of the pattern in a self-aligned manner.Type: GrantFiled: October 13, 1999Date of Patent: October 8, 2002Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering CorporationInventors: Hiroshi Matsuo, Takuji Oda, Yuichi Yokoyama, Kiyoshi Maeda, Shinya Inoue, Yuji Yamamoto
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Patent number: 6444515Abstract: A hard mask insulating layer is formed on a gate electrode which is formed on a main surface of a silicon substrate with a gate insulating layer interposed. An SiN sidewall spacer is directly formed on a thin SiO2 layer which is formed to cover a side surface of the gate electrode. A contact hole is formed to penetrate an interlayer insulating layer formed on an SiN stopper layer and reach the main surface of the silicon substrate.Type: GrantFiled: January 18, 2001Date of Patent: September 3, 2002Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering CorporationInventors: Hiroshi Matsuo, Yuichi Yokoyama, Takuji Oda, Kiyoshi Maeda, Shinya Inoue, Yuji Yamamoto
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Publication number: 20010019156Abstract: A hard mask insulating layer is formed on a gate electrode which is formed on a main surface of a silicon substrate with a gate insulating layer interposed. An SiN sidewall spacer is directly formed on a thin SiO2 layer which is formed to cover a side surface of the gate electrode. A contact hole is formed to penetrate an interlayer insulating layer formed on an SiN stopper layer and reach the main surface of the silicon substrate.Type: ApplicationFiled: January 18, 2001Publication date: September 6, 2001Applicant: Mitsubishi Denki Kabushiki KaishaInventors: Hiroshi Matsuo, Yuichi Yokoyama, Takuji Oda, Kiyoshi Maeda, Shinya Inoue, Yuji Yamamoto
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Patent number: 6249015Abstract: A hard mask insulating layer is formed on a gate electrode which is formed on a main surface of a silicon substrate with a gate insulating layer interposed. An SiN sidewall spacer is directly formed on a thin SiO2 layer which is formed to cover a side surface of the gate electrode. A contact hole is formed to penetrate an interlayer insulating layer formed on an SiN stopper layer and reach the main surface of the silicon substrate.Type: GrantFiled: July 15, 1998Date of Patent: June 19, 2001Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering CorporationInventors: Hiroshi Matsuo, Yuichi Yokoyama, Takuji Oda, Kiyoshi Maeda, Shinya Inoue, Yuji Yamamoto
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Patent number: 6236538Abstract: A magnetic structure and a magnetic head capable of reducing the size thereof and raising the degree of integration is disclosed which has a structure including a substrate having a plurality of ridge-like projections each having slant side-surfaces; the substrate having thereon: a first conductive passage consisting of a plurality of parallel and conductive passages each of which is formed on opposing slant surfaces of adjacent projections and on the bottom surface between the slant surfaces; a first insulating layer stacked on the first conductive passage and the substrate; a magnetic core made of magnetic material enclosed in a groove-shape recess formed by the adjacent projections and the bottom surface; a second insulating layer stacked on the magnetic core; and a second conductive passage formed on the second insulating layer to sequentially connect ends of the first conductive passage to form a helical coil, wherein the magnetic core is separated by the projection so that a plurality of coils are integType: GrantFiled: October 14, 1993Date of Patent: May 22, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Naoshi Yamada, Hitoshi Ohta, Hiroshi Fukumoto, Naoya Tanaka, Yuichi Yoshida, Takuji Oda
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Patent number: 5994227Abstract: An improved etching method allowing the formation of a silicon nitride film with an adequate film thickness at the sidewall portion of a pattern is disclosed. A silicon nitride film formed to cover a stepped pattern is dry-etched, employing plasma of mixed gases containing CH.sub.2 F.sub.2 and O.sub.2. As a result, a sidewall spacer of the silicon nitride film is formed at the sidewall of the pattern in a self-aligned manner.Type: GrantFiled: July 20, 1998Date of Patent: November 30, 1999Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering CorporationInventors: Hiroshi Matsuo, Takuji Oda, Yuichi Yokoyama, Kiyoshi Maeda, Shinya Inoue, Yuji Yamamoto
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Patent number: 5883760Abstract: A magnetic structure and a magnetic head capable of reducing the size thereof and raising the degree of integration is disclosed which has a structure including a substrate having a plurality of ridge-like projections each having slant side-surfaces; the substrate having thereon: a first conductive passage consisting of a plurality of parallel and conductive passages each of which is formed on opposing slant surfaces of adjacent projections and on the bottom surface between the slant surfaces; a first insulating layer stacked on the first conductive passage and the substrate; a magnetic core made of magnetic material enclosed in a groove-shape recess formed by the adjacent projections and the bottom surface; a second insulating layer stacked on the magnetic core; and a second conductive passage formed on the second insulating layer to sequentially connect ends of the first conductive passage to form a helical coil, wherein the magnetic core is separated by the projection so that a plurality of coils are integType: GrantFiled: March 28, 1997Date of Patent: March 16, 1999Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Naoshi Yamada, Hitoshi Ohta, Hiroshi Fukumoto, Naoya Tanaka, Yuichi Yoshida, Takuji Oda
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Patent number: 5403989Abstract: In a color cathode-ray tube, only a foreign matter adhering to a shadow mask is removed effectively without thermal deformation of the shadow mask or thermal denaturation of phosphors.An electron beam produced by an electron gun incorporated in a cathode-ray tube itself is scanned or irradiated to all over a shadow mask of the color cathode-ray tube. The radiant state of a fluorescent screen at this stage is checked to detect a foreign matter adhering to the shadow mask. The electron beam is deflected to align with the position at which the foreign matter is detected, and then irradiated to the foreign matter in the form of pulses. Thus, the foreign matter is heated and removed.Type: GrantFiled: March 24, 1993Date of Patent: April 4, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hiroaki Tobuse, Tomoyuki Kanda, Yasusi Hisaoka, Shigeo Sasaki, Minoru Kobayashi, Takuji Oda, Ryuji Ueda, Akio Yoshida, Tadayoshi Owaki, Akihiko Yamasaki, Masaaki Kinoshita, Toshiaki Fukunishi