Patents by Inventor Takumi Ihara
Takumi Ihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11694985Abstract: A semiconductor device includes a wiring board, a semiconductor chip arranged on the wiring board, and a plurality of bumps arranged between the wiring board and the semiconductor chip, wherein the wiring board includes a first conductor, a second conductor, a third conductor, a first via, a second via, and a third via, wherein the second conductor is arranged at a position closer to a center of the semiconductor chip than the first conductor is to the center, as seen in a thickness direction, the first conductor and the second conductor are arranged next to each other without another conductor interposed therebetween, as seen in the thickness direction, and a first distance between the first conductor and the second conductor is larger than a second distance between the first conductor and the third conductor.Type: GrantFiled: January 20, 2022Date of Patent: July 4, 2023Assignee: SOCIONEXT INC.Inventors: Takumi Ihara, Masanori Natsuaki
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Publication number: 20220148991Abstract: A semiconductor device includes a wiring board, a semiconductor chip arranged on the wiring board, and a plurality of bumps arranged between the wiring board and the semiconductor chip, wherein the wiring board includes a first conductor, a second conductor, a third conductor, a first via, a second via, and a third via, wherein the second conductor is arranged at a position closer to a center of the semiconductor chip than the first conductor is to the center, as seen in a thickness direction, the first conductor and the second conductor are arranged next to each other without another conductor interposed therebetween, as seen in the thickness direction, and a first distance between the first conductor and the second conductor is larger than a second distance between the first conductor and the third conductor.Type: ApplicationFiled: January 20, 2022Publication date: May 12, 2022Inventors: Takumi IHARA, Masanori NATSUAKI
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Patent number: 11329019Abstract: A semiconductor device includes a wiring board, a semiconductor chip arranged on the wiring board, and a plurality of bumps arranged between the wiring board and the semiconductor chip, wherein the wiring board includes a first conductor, a second conductor, a third conductor, a first via, a second via, and a third via, wherein the second conductor is arranged at a position closer to a center of the semiconductor chip than the first conductor is to the center, as seen in a thickness direction, the first conductor and the second conductor are arranged next to each other without another conductor interposed therebetween, as seen in the thickness direction, and a first distance between the first conductor and the second conductor is larger than a second distance between the first conductor and the third conductor.Type: GrantFiled: November 17, 2020Date of Patent: May 10, 2022Assignee: SOCIONEXT INC.Inventors: Takumi Ihara, Masanori Natsuaki
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Publication number: 20210159199Abstract: A semiconductor device includes a wiring board, a semiconductor chip arranged on the wiring board, and a plurality of bumps arranged between the wiring board and the semiconductor chip, wherein the wiring board includes a first conductor, a second conductor, a third conductor, a first via, a second via, and a third via, wherein the second conductor is arranged at a position closer to a center of the semiconductor chip than the first conductor is to the center, as seen in a thickness direction, the first conductor and the second conductor are arranged next to each other without another conductor interposed therebetween, as seen in the thickness direction, and a first distance between the first conductor and the second conductor is larger than a second distance between the first conductor and the third conductor.Type: ApplicationFiled: November 17, 2020Publication date: May 27, 2021Inventors: Takumi Ihara, Masanori Natsuaki
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Patent number: 10008432Abstract: A semiconductor device includes a substrate and a semiconductor element mounted on the top surface of the substrate. On the top surface of the substrate, one or more pads are disposed outside the mounted semiconductor element when seen in a plan view. Then, a protrusion is disposed on each of the pads. A heat sink is disposed above the semiconductor element and the protrusions, and then bonded to the substrate by an adhesive provided between the heat sink and the substrate. The adhesive is provided in such a manner as to be in contact with the protrusions on the substrate.Type: GrantFiled: July 21, 2016Date of Patent: June 26, 2018Assignee: SOCIONEXT INC.Inventors: Takumi Ihara, Nobutaka Shimizu, Masamitsu Ikumo
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Publication number: 20170047266Abstract: A semiconductor device includes a substrate and a semiconductor element mounted on the top surface of the substrate. On the top surface of the substrate, one or more pads are disposed outside the mounted semiconductor element when seen in a plan view. Then, a protrusion is disposed on each of the pads. A heat sink is disposed above the semiconductor element and the protrusions, and then bonded to the substrate by an adhesive provided between the heat sink and the substrate. The adhesive is provided in such a manner as to be in contact with the protrusions on the substrate.Type: ApplicationFiled: July 21, 2016Publication date: February 16, 2017Inventors: Takumi Ihara, Nobutaka Shimizu, Masamitsu Ikumo
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Patent number: 9472482Abstract: A semiconductor device includes a substrate, a semiconductor element disposed on the substrate, a heat radiating plate disposed on the substrate and covering the semiconductor element, and a connection member connecting an upper surface of the semiconductor element and a lower surface of the heat radiating plate, wherein the connection member includes a first member being in contact with the upper surface of the semiconductor element and having a first melting point, a second member being in contact with the first member, having a larger area than the first member, and having a second melting point higher than the first melting point, and a third member interposed between the second member and the heat radiating plate, having an area smaller than the second member, and having a third melting point lower than the second melting point.Type: GrantFiled: February 20, 2014Date of Patent: October 18, 2016Assignee: SOCIONEXT INC.Inventors: Takumi Ihara, Masami Mouri
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Patent number: 9425088Abstract: A semiconductor device includes: a substrate; a semiconductor element installed on the substrate so that a surface formed with an electrode is directed to the substrate; a chip capacitor installed on the substrate; and a conductive material covering a rear surface opposite to the surface of the semiconductor element and joining to one terminal electrode of the chip capacitor.Type: GrantFiled: April 13, 2013Date of Patent: August 23, 2016Assignee: SOCIONEXT INC.Inventors: Takumi Ihara, Seiji Ueno, Joji Fujimori, Yasunori Fujimoto
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Patent number: 9385092Abstract: A semiconductor device includes a substrate, a semiconductor chip mounted on the substrate, a plate-like member that is fixed on the semiconductor chip and has a thermal expansion coefficient different from that of the substrate, and a first adhesive that is provided between the substrate and the plate-like member, the first adhesive being connected to the plate-like member and separated from the substrate, or being separated from the plate-like member and connected to the substrate.Type: GrantFiled: August 21, 2013Date of Patent: July 5, 2016Assignee: SOCIONEXT INC.Inventor: Takumi Ihara
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Patent number: 8962394Abstract: A semiconductor device includes a substrate, a semiconductor element disposed on the substrate, and a heat conductive member composed of a solder material. The heat conductive member covers the semiconductor element, and is connected to a connection pad formed on the substrate. A heat radiator is disposed on the heat conductive member. The heat conductive member thermally connecting the semiconductor element to the heat radiator reduces the risk that electromagnetic noise may be emitted from or may be incident on the semiconductor element.Type: GrantFiled: September 3, 2014Date of Patent: February 24, 2015Assignee: Fujitsu Semiconductor LimitedInventor: Takumi Ihara
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Patent number: 8933560Abstract: A semiconductor device includes a substrate, a semiconductor element disposed on the substrate, a heat radiating plate disposed on the substrate and covering the semiconductor element, and a connection member connecting an upper surface of the semiconductor element and a lower surface of the heat radiating plate, wherein the connection member includes a first member being in contact with the upper surface of the semiconductor element and having a first melting point, a second member being in contact with the first member, having a larger area than the first member, and having a second melting point higher than the first melting point, and a third member interposed between the second member and the heat radiating plate, having an area smaller than the second member, and having a third melting point lower than the second melting point.Type: GrantFiled: September 27, 2012Date of Patent: January 13, 2015Assignee: Fujitsu Semiconductor LimitedInventors: Takumi Ihara, Masami Mouri
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Publication number: 20140370660Abstract: A semiconductor device includes a substrate, a semiconductor element disposed on the substrate, and a heat conductive member composed of a solder material. The heat conductive member covers the semiconductor element, and is connected to a connection pad formed on the substrate. A heat radiator is disposed on the heat conductive member. The heat conductive member thermally connecting the semiconductor element to the heat radiator reduces the risk that electromagnetic noise may be emitted from or may be incident on the semiconductor element.Type: ApplicationFiled: September 3, 2014Publication date: December 18, 2014Inventor: Takumi IHARA
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Patent number: 8853851Abstract: A semiconductor device includes a substrate, a semiconductor element disposed on the substrate, and a heat conductive member composed of a solder material. The heat conductive member covers the semiconductor element, and is connected to a connection pad formed on the substrate. A heat radiator is disposed on the heat conductive member. The heat conductive member thermally connecting the semiconductor element to the heat radiator reduces the risk that electromagnetic noise may be emitted from or may be incident on the semiconductor element.Type: GrantFiled: January 26, 2012Date of Patent: October 7, 2014Assignee: Fujitsu Semiconductor LimitedInventor: Takumi Ihara
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Publication number: 20140167246Abstract: A semiconductor device includes a substrate, a semiconductor element disposed on the substrate, a heat radiating plate disposed on the substrate and covering the semiconductor element, and a connection member connecting an upper surface of the semiconductor element and a lower surface of the heat radiating plate, wherein the connection member includes a first member being in contact with the upper surface of the semiconductor element and having a first melting point, a second member being in contact with the first member, having a larger area than the first member, and having a second melting point higher than the first melting point, and a third member interposed between the second member and the heat radiating plate, having an area smaller than the second member, and having a third melting point lower than the second melting point.Type: ApplicationFiled: February 20, 2014Publication date: June 19, 2014Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventors: Takumi Ihara, Masami Mouri
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Publication number: 20140084439Abstract: A semiconductor device includes a substrate, a semiconductor chip mounted on the substrate, a plate-like member that is fixed on the semiconductor chip and has a thermal expansion coefficient different from that of the substrate, and a first adhesive that is provided between the substrate and the plate-like member, the first adhesive being connected to the plate-like member and separated from the substrate, or being separated from the plate-like member and connected to the substrate.Type: ApplicationFiled: August 21, 2013Publication date: March 27, 2014Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Takumi Ihara
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Patent number: 8673684Abstract: A disclosed semiconductor device includes a wiring board, a semiconductor element mounted on a principal surface of the wiring board with flip chip mounting, a first conductive pattern formed on the principal surface along at least an edge portion of the semiconductor element, a second conductive pattern formed on the principal surface along the first conductive pattern and away from the first conductive pattern, a passive element bridging between the first conductive pattern and the second conductive pattern on the principal surface of the wiring board, and a resin layer filling a space between the wiring board and the semiconductor chip, wherein the resin layer extends between the semiconductor element and the first conductive pattern on the principal surface of the wiring board.Type: GrantFiled: April 9, 2012Date of Patent: March 18, 2014Assignee: Fujitsu Semiconductor LimitedInventor: Takumi Ihara
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Patent number: 8564121Abstract: A semiconductor device includes: a substrate; a semiconductor element installed on the substrate so that a surface formed with an electrode is directed to the substrate; a chip capacitor installed on the substrate; and a conductive material covering a rear surface opposite to the surface of the semiconductor element and joining to one terminal electrode of the chip capacitor.Type: GrantFiled: September 23, 2011Date of Patent: October 22, 2013Assignee: Fujitsu Semiconductor LimitedInventors: Takumi Ihara, Seiji Ueno, Joji Fujimori, Yasunori Fujimoto
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Patent number: 8541259Abstract: A disclosed semiconductor device includes a wiring board, a semiconductor element mounted on a principal surface of the wiring board with flip chip mounting, a first conductive pattern formed on the principal surface along at least an edge portion of the semiconductor element, a second conductive pattern formed on the principal surface along the first conductive pattern and away from the first conductive pattern, a passive element bridging between the first conductive pattern and the second conductive pattern on the principal surface of the wiring board, and a resin layer filling a space between the wiring board and the semiconductor chip, wherein the resin layer extends between the semiconductor element and the first conductive pattern on the principal surface of the wiring board.Type: GrantFiled: April 9, 2012Date of Patent: September 24, 2013Assignee: Fujitsu Semiconductor LimitedInventor: Takumi Ihara
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Patent number: 8299607Abstract: A semiconductor device includes a substrate, a semiconductor element disposed on the substrate, a heat radiating plate disposed on the substrate and covering the semiconductor element, and a connection member connecting an upper surface of the semiconductor element and a lower surface of the heat radiating plate, wherein the connection member includes a first member being in contact with the upper surface of the semiconductor element and having a first melting point, a second member being in contact with the first member, having a larger area than the first member, and having a second melting point higher than the first melting point, and a third member interposed between the second member and the heat radiating plate, having an area smaller than the second member, and having a third melting point lower than the second melting point.Type: GrantFiled: February 24, 2011Date of Patent: October 30, 2012Assignee: Fujitsi Semiconductor LimitedInventors: Takumi Ihara, Masami Mouri
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Publication number: 20120270370Abstract: A disclosed semiconductor device includes a wiring board, a semiconductor element mounted on a principal surface of the wiring board with flip chip mounting, a first conductive pattern formed on the principal surface along at least an edge portion of the semiconductor element, a second conductive pattern formed on the principal surface along the first conductive pattern and away from the first conductive pattern, a passive element bridging between the first conductive pattern and the second conductive pattern on the principal surface of the wiring board, and a resin layer filling a space between the wiring board and the semiconductor chip, wherein the resin layer extends between the semiconductor element and the first conductive pattern on the principal surface of the wiring board.Type: ApplicationFiled: April 9, 2012Publication date: October 25, 2012Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Takumi Ihara